Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6074615
Kind Code:
A
Abstract:
PURPOSE:To eliminate a disconnection failure and to improve the yield by forming a metal wiring on the insulating film which is levelled by filling level-different parts and removing overhangs of the film formed on a semiconductor surface. CONSTITUTION:After forming source and drain regions 5 and 5', a thin oxide film 6 is formed over the whole surface. Next, when a PSG film 7 is formed as an interlayer insulating film is formed, an overhangs 8 and a narrowed parts 9 are formed in the direction of side planes of a gate 4. An Si compound solution including phosphorus is spreaded over the substrate so as to fill level-different parts followed by calcination to form an oxide film 10 including phosphorus. By the formation of the oxide film 10, the narrowed part 9 is filled and levelling is promoted. When etching is done to such extent that the oxide film 10 of a flat part is removed, the overhang 8 of the PSG film onto which an electric field is apt to concentrate is much etched to be levelled. Meanwhile, as the oxide film 10 is left in the narrowed part 9, levelling of the semiconductor surface is further promoted. Subsequently, apertures are arranged on the oxide layer above the source and drain regions 5 and 5' to form an Al wiring.
Inventors:
UDA KEIICHIROU
Application Number:
JP18342383A
Publication Date:
April 26, 1985
Filing Date:
September 30, 1983
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L21/768; H01L21/28; (IPC1-7): H01L21/88
Attorney, Agent or Firm:
Uchihara Shin