To eliminate the need for a PLL circuit while ensuring a robust performance for variation in a power source voltage, or a quality of a triangular wave, in the triangular wave generating circuit of a class D amplifier.

A constant current I1 flows through FETs 205-207 when a clock pulse is in an H level. A constant current I2 flows through FETs 212-214 when the clock pulse is in an L level. The constant currents I1, I2 charge a capacitor C3. Integrating operations of an operational amplifier 215 and the capacitor C3 generate the triangular wave. The servo operation of an operational amplifier 216 suppresses the phase deviation of the triangular wave. Since the maximum voltage value and the minimum voltage value of the triangular wave are proportional to power source voltages VPX and VMX, the gain of the class D amplifier becomes constant irrespective of the variations in the power source voltages VPX and VMX.