PURPOSE: To eliminate a need of a transformer by outputting the in-phase output and the anti-phase output of a clock signal by a gate circuit.

CONSTITUTION: The clock signal inputted to a signal input terminal 1 is inputted to a gate circuit 2, and the in-phase output and the anti-phase output are outputted from this circuit 2. One output passes a variable resistance 4 and the other passes a capacitor 5, and they are added and are outputted from a signal output terminal 6. At this time, the sum of these two signals is taken to convert signals to a vector sum; and when the resistance value of the variable resistance 4 is changed, the vector sum is changed to output the signal, which has the phase changed, from the signal output terminal 6. Thus, a transformer to get the in-phase output and the anti-phase output is unnecessary to reduce the scale and the weight of the circuit.