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Patent Searching and Data


Title:
VIDEO SIGNAL TIME AXIS CORRECTION CIRCUIT
Document Type and Number:
Japanese Patent JPH05284467
Kind Code:
A
Abstract:

PURPOSE: To improve a V-shaped play attended with increase/decrease in a horizontal line number caused by memory jump by providing causing the memory jump for a prescribed period before a vertical synchronizing signal relating to a video signal whose time axis is corrected based on a time difference between a write timing and a read timing of the circuit.

CONSTITUTION: The circuit is provided with a write means 1 writing a video signal 1a to memory means 2-5 in a prescribed write timing by using a write clock signal WCK synchronously with the video signal 1a and with a read means 6 reading the video signal 1a subject to time axis correction in a prescribed read timing from the memory means 2-5 by using a fixed read clock signal RCK. Then a memory jump means 7 causes the memory jump for a prescribed period before a vertical synchronizing signal relating to the video signal whose time axis is corrected based on a time difference between the write timing and the read timing.


Inventors:
竹下 浩
生方 典夫
Application Number:
JP1992000105708
Publication Date:
October 29, 1993
Filing Date:
March 31, 1992
Export Citation:
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Assignee:
日本ビクター株式会社
International Classes:
H04N5/956; H04N5/907; (IPC1-7): H04N5/95; H04N5/907
Domestic Patent References:
JPH05219480A1993-08-27