Title:
波形発生装置、半導体試験装置、および半導体デバイス
Document Type and Number:
Japanese Patent JP4105831
Kind Code:
B2
Abstract:
A waveform generation circuit 16 comprises an input terminal 28, a composing unit 21, a delay unit 23, a processing unit 25, a memory unit 27 and an output terminal 52. The predetermined pulse enters the input terminal 28 as an input signal. The delay unit 23 comprises a plurality of consecutively numbered delay elements 30, 31, . . . to 314 which delays the propagation of the input signal. The processing unit 25 has a plurality of processing means, each of that can output a delayed signal. The composing unit 21 composes said delayed signals so that an output waveform is generated.
Inventors:
Yasuo Furukawa
Application Number:
JP21823599A
Publication Date:
June 25, 2008
Filing Date:
July 30, 1999
Export Citation:
Assignee:
Advantest Corporation
International Classes:
G01R31/3183; G01R31/28; H03K5/06; H03K4/02
Domestic Patent References:
| JP54023364A | ||||
| JP56011494A | ||||
| JP10209757A | ||||
| JP49034265A | ||||
| JP8037453A | ||||
| JP10142277A | ||||
| JP9064745A | ||||
| JP4365218A | ||||
| JP1141381A |
Attorney, Agent or Firm:
Akihiro Ryuka