To provide a manufacturing method for thin-film transistors, wherein the low resistance of silver (Ag) wiring are taken advantage of, and further, adhesion and etching profiles are complemented.
The manufacturing method for the thin-film transistors includes the steps of forming a first signal line over a substrate 110; sequentially forming a gate insulating film 140 and a semiconductor layer over the first signal line; forming a second signal line 171 over the gate insulating film 140 and the semiconductor layer; and forming a pixel electrode 191 to be joined with the second signal line 171. At least either the step for forming the first signal line or the step for forming the second signal line 171 includes the steps of forming a first conductive oxide film; forming a conductive layer containing silver (Ag); and forming a second conductive oxide film at a temperature lower than of the first conductive oxide film.
| JPH06124948 | WIRING FORMING METHOD |
| JPH02208939 | SEMICONDUCTOR DEVICE |
| JPS57145341 | INTEGRATED CIRCUIT DEVICE |
BOKU KOSHOKU
SHIN WON-SUK
| JP2006163367A | 2006-06-22 | |||
| JP2004355918A | 2004-12-16 | |||
| JPH09281473A | 1997-10-31 | |||
| JP2002038262A | 2002-02-06 | |||
| JP2005513808A | 2005-05-12 | |||
| JP2006163367A | 2006-06-22 |
Yasuo Nara
Katsuyuki Utani
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