Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
WRITING AND READING DEVICE FOR RANDOM ACCESS MEMORY
Document Type and Number:
Japanese Patent JPS5896359
Kind Code:
A
Abstract:

PURPOSE: To adjust periods of writing to and reading from RAMs of two CPUs by pulling up or down data buses of the CPUs, writing 0 or 1 in at least one bit of a specified address of each RAM, and reading this data.

CONSTITUTION: A CPU-A1 writes data to be sent to a CPU-B2 in an RAM7 and in a specified address of the RAM7, one bit of 0 or 1 where data buses 9 and 10 are pulled up or down is written. After the data writing, a signal is sent out to a bus 15 and a control part 3 controls bus changeover switches 6 and 8 to connect the RAM7 to the CPU.B2. At this time, the CPU.B2 is allowed to read the specified address of the RAm7 and obtains at least one data 0 or 1, so the CPU.B2 knows that it can use the RAM7.


More Like This:
Inventors:
SUGITA TAKUYA
TSUKAMOTO KATSUHIDE
SHIMA KIMIKO
SAKAMOTO HISAO
Application Number:
JP19392481A
Publication Date:
June 08, 1983
Filing Date:
December 01, 1981
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F12/00; G06F15/16; G06F15/167; G06F15/177; (IPC1-7): G06F13/00; G06F15/16