Title:
A drive method of a signal-processing circuit
Document Type and Number:
Japanese Patent JP6030424
Kind Code:
B2
Abstract:
A memory element capable of operating at high speed and reducing power consumption and a signal processing circuit including the memory element are provided. As a writing transistor, a transistor which is formed using an oxide semiconductor and has significantly high off-state resistance is used. In a memory element in which a source of the writing transistor is connected to an input terminal of an inverter, a control terminal of a transfer gate, or the like, the threshold voltage of the writing transistor is lower than a low-level potential. The highest potential of a gate of the writing transistor can be a high-level potential. When the potential of data is the high-level potential, there is no potential difference between a channel and the gate; thus, even when the writing transistor is subsequently turned off, a potential on the source side hardly changes.
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Inventors:
Yasuhiko Takemura
Application Number:
JP2012266299A
Publication Date:
November 24, 2016
Filing Date:
December 05, 2012
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H03K3/356; G11C11/405; H01L21/336; H01L21/8234; H01L21/8236; H01L21/8242; H01L21/8247; H01L27/06; H01L27/088; H01L27/108; H01L27/115; H01L29/786; H01L29/788; H01L29/792
Domestic Patent References:
| JP11176153A | ||||
| JP2011211185A | ||||
| JP2008234794A | ||||
| JP2011151791A | ||||
| JP2008052847A | ||||
| JP61053759A | ||||
| JP2009295781A |
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