Title:
An information processor, a method for controlling the same, an electronic devide, a program, and a storage
Document Type and Number:
Japanese Patent JP6161266
Kind Code:
B2
Abstract:
A technique of high-speed information processing is realized by determining a method of accessing processing target data so as to allow high-speed access in consideration of a memory architecture. According to the technique, in a method of performing information processing by sequentially referring to element data of the processing target data stored in a main memory according to a predetermined information processing rule such as a recognition dictionary, when generating the information processing rule, a reference order of the element data which improves a cache hit rate is determined based on a rule for storing the element data of the processing target data in the main memory, records of the positions of referred element data, and the cache architecture.
Inventors:
Yoshinori Ito
Hideo Noro
Hideo Noro
Application Number:
JP2012259059A
Publication Date:
July 12, 2017
Filing Date:
November 27, 2012
Export Citation:
Assignee:
Canon Inc
International Classes:
G06T1/60; G06F12/08; G06V10/774
Domestic Patent References:
| JP2012128622A | ||||
| JP2003157243A | ||||
| JP2008015562A | ||||
| JP2010244327A |
Foreign References:
| US20050129311 | ||||
| US20100296740 |
Attorney, Agent or Firm:
Yasunori Otsuka
Shiro Takayanagi
Yasuhiro Otsuka
Shuji Kimura
Osamu Shimoyama
Nagakawa Yukimitsu
Shiro Takayanagi
Yasuhiro Otsuka
Shuji Kimura
Osamu Shimoyama
Nagakawa Yukimitsu