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Title:
リードフレーム及び半導体装置
Document Type and Number:
Japanese Patent JP3547704
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a lead frame which can prevent the peel off of leads from a sealing resin and burs on the outside exposed support bars, and a semiconductor device. SOLUTION: A plurality of semiconductor chip mounts 2b are made in a matrix to form unit frame sets 7, and the sets 7 are mounted on a lead frame base 5B. A semiconductor chip is mounted on the semiconductor chip surface of each unit frame 2, the entire unit frame set 7 is sealed with resin to form a resin sealed body 8, and this body is cut to manufacture semiconductor devices. At least, the cut part has thin-walled support bars 2s formed by removing the back side of each unit frame, the tie bars 6 formed thinner than the thickness of the lead frame base 5B, and boundaries 6o formed thinner than the thickness of the base 5B, thus forming a lead frame.

Inventors:
Naoshi Yasunaga
Hideshi Hanada
Takahiro Ishibashi
Atsushi Sugimoto
Yuichi Michiki
Hitoshi Eto
Application Number:
JP2000388711A
Publication Date:
July 28, 2004
Filing Date:
December 21, 2000
Export Citation:
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Assignee:
Mitsui High Tech Co., Ltd.
International Classes:
B21D22/02; H01L21/301; H01L21/56; H01L23/12; H01L23/28; H01L23/50; (IPC1-7): H01L23/50; H01L21/56; H01L23/12; H01L23/28
Domestic Patent References:
JP2001326316A
JP2001320007A
JP2001244399A
JP2001274308A
JP2001267482A
JP2001326295A
Attorney, Agent or Firm:
Takahisa Kimura