Title:
The method and processor for performing one or more digital front end (DFE) functions to a signal by software
Document Type and Number:
Japanese Patent JP6037318
Kind Code:
B2
Abstract:
Maximum likelihood bit-stream generation and detection techniques are provided using the M-algorithm and Infinite Impulse Response (IIR) filtering. The M-Algorithm is applied to a target input signal X to perform Maximum Likelihood Sequence Estimation on the target input signal X to produce a digital bit stream B, such that after filtering by an IIR filter, the produced digital stream Y produces an error signal satisfying one or more predefined requirements. The predefined requirements comprise, for example, a substantially minimum error. In an exemplary bit detection implementation, the target input signal X comprises an observed analog signal and the produced digital stream Y comprises a digitized output of a receive channel corresponding to a transmitted bit stream. In an exemplary bit stream generation implementation, the target input signal X comprises a desired transmit signal and the produced digital stream Y comprises an estimate of the desired transmit signal.
Inventors:
Azadet, Cameran
Li, change
Molina, Alberto
Osmer, Joseph, Etch.
Pinault, Stephen, Sea.
You, Menlin
Williams, Joseph
Perez, Ramon, Sanchez
Chen, Jen-Guo
Li, change
Molina, Alberto
Osmer, Joseph, Etch.
Pinault, Stephen, Sea.
You, Menlin
Williams, Joseph
Perez, Ramon, Sanchez
Chen, Jen-Guo
Application Number:
JP2014539057A
Publication Date:
December 07, 2016
Filing Date:
October 26, 2012
Export Citation:
Assignee:
INTEL CORPORATION
International Classes:
H04B1/40; H03H17/00; H03H17/02; H03H21/00; H04B1/04; H04B3/04; H04B7/005; H04L27/00; H04L27/01
Domestic Patent References:
| JP2006279780A | ||||
| JP2002541703A | ||||
| JP2000201099A | ||||
| JP2002064399A | ||||
| JP5069899A |
Foreign References:
| US6549067 |
Attorney, Agent or Firm:
Longhua International Patent Service Corporation
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