Title:
パルス出力機能付マイクロコンピュータ
Document Type and Number:
Japanese Patent JP4204655
Kind Code:
B2
Abstract:
A microcomputer capable of outputting pulses in which an arithmetic processing unit outputs pulse control data according to the receiving of a trigger signal transferred from a trigger circuit, a data latch circuit latches each kind of pulse control data to be used for controlling output operation of the control register that stores the pulse control data, the data latch circuit outputs a pulse control signal, a NAND circuit performs a logical arithmetic operation between the output from the pulse generation circuit and the pulse control signal from the data latch circuit, so that a desired pulse or a pulse train is output in real time.
Inventors:
Akihiko Wakimoto
Application Number:
JP21522997A
Publication Date:
January 07, 2009
Filing Date:
August 08, 1997
Export Citation:
Assignee:
Renesas Technology Corp.
International Classes:
G06F1/08; G06F15/78; G06F9/22; G06F9/302; G06F13/00; H03K4/00; H03K7/08
Domestic Patent References:
| JP4054683A | ||||
| JP3045166A | ||||
| JP3070475A |
Attorney, Agent or Firm:
Kuro Fukami
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Hisato Noda
Masayuki Sakai
Nobuo Arakawa
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Hisato Noda
Masayuki Sakai
Nobuo Arakawa
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