Title:
【発明の名称】インタ―ポ―ザ・キャパシタ構造
Document Type and Number:
Japanese Patent JP3014383
Kind Code:
B2
Abstract:
A multilayer ceramic substrate having a thin film structure containing capacitor connected thereto is provided as an interposer capacitor, the capacitor employing platinum as the bottom electrode of the capacitor. In a preferred capacitor, a dielectric material such as barium titanate is used as the dielectric material between the capacitor electrodes. The fabrication of the interposer capacitor requires an in-situ or post deposition high temperature anneal and the use of such dielectrics requires heating of the capacitor structure in a non-reducing atmosphere. A layer of a high temperature, thin film diffusion barrier such as TaSiN on the lower platinum electrode between the electrode and underlying multilayer ceramic substrate prevents or minimizes oxidization of the metallization of the multilayer ceramic substrate to which the thin film structure is connected during the fabrication process. A method is also provided for fabricating an interposer capacitor with a multilayer ceramic substrate base and a thin film multilayer structure having at least one capacitor comprising at least one bottom platinum electrode.
Inventors:
Mukta S. Farouk
David E. Kotekki
Robert A. Rita
Stephen M Rosnagel
David E. Kotekki
Robert A. Rita
Stephen M Rosnagel
Application Number:
JP3293499A
Publication Date:
February 28, 2000
Filing Date:
February 10, 1999
Export Citation:
Assignee:
International Business Machines Corporation
International Classes:
H01L27/04; H01L21/822; H01L23/498; H01L21/02; H01L21/285; H05K1/03; H05K1/16; (IPC1-7): H01L27/04; H01L21/822; H05K3/46
Domestic Patent References:
| JP2178994A | ||||
| JP992978A | ||||
| JP5737818A | ||||
| JP414862A |
Attorney, Agent or Firm:
Hiroshi Sakaguchi (1 person outside)