Title:
SELF-ALIGNED SILICIDE MOSFET AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JPH0766406
Kind Code:
A
Abstract:
PURPOSE: To restrain the increase of gate resistance in accordance with the reduction of gate size, and realize the high speed operation of a circuit.
CONSTITUTION: In a self-aligned silicide MOSFET, high melting point metal silicide 31 is formed in at least a part of both side surfaces of a gate electrode 24 and at least a part of the lower portion of a side wall 28 of the gate electrode 24.
Inventors:
IDA JIRO
Application Number:
JP21058493A
Publication Date:
March 10, 1995
Filing Date:
August 25, 1993
Export Citation:
Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H01L21/28; H01L21/336; H01L29/78; (IPC1-7): H01L29/78; H01L21/28; H01L21/336
Attorney, Agent or Firm:
Mamoru Shimizu (1 person outside)
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