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Title:
改善された利得を有するソースフォロア回路及びそれを利用した固体撮像装置の出力回路
Document Type and Number:
Japanese Patent JP4195150
Kind Code:
B2
Abstract:
Solid-state image pickup devices having source follower buffer circuits therein include load impedance control circuits that boost gain. The source follower buffer circuit comprises a drive transistor and a load transistor that are electrically connected in series (i.e., source-to-drain) between a first reference potential (e.g., Vdd) and a second reference potential (e.g., Vss). The input of the drive transistor is electrically connected to an input terminal. The source follower circuit provides a high impedance path to an input signal Vin and a less than unity voltage gain at an output terminal (i.e., Vout

Inventors:
Park
Application Number:
JP14240399A
Publication Date:
December 10, 2008
Filing Date:
May 21, 1999
Export Citation:
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Assignee:
SAMSUNG ELECTRONICS CO.,LTD.
International Classes:
H01L21/339; H01L27/148; H01L29/762; H04N5/335; H04N5/341; H04N5/369; H04N5/372; H04N5/374; H04N5/378
Domestic Patent References:
JP7154532A
JP11136582A
Attorney, Agent or Firm:
Masatake Shiga
Takashi Watanabe
Yasuhiko Murayama
Shinya Mitsuhiro