Title:
半導体装置およびその製造方法
Document Type and Number:
Japanese Patent JP4564272
Kind Code:
B2
Abstract:
A method of fabricating a semiconductor device includes etching a silicon oxide film, a silicon nitride film, a polycrystalline silicone film, and a gate insulating film in a predetermined pattern including a first opening width corresponding to a first trench and a second opening width corresponding to a second trench, the second opening width being larger than the first opening width, and etching the semiconductor substrate to simultaneously form the first and second trenches so that a first depth of the first trench is equal to a second depth of the second trench, and a first angle between a first side surface and a first bottom surface of the first trench is smaller than a second angle between a second side surface and a second bottom surface of the second trench, and the first trench includes a curved portion at an upper portion of the first side surface.
Inventors:
Takanori Matsumoto
Application Number:
JP2004085051A
Publication Date:
October 20, 2010
Filing Date:
March 23, 2004
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L21/3065; H01L21/76; H01L21/762; H01L21/8247; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JP3196624A | ||||
| JP9289313A | ||||
| JP2001068543A | ||||
| JP2004087843A |
Attorney, Agent or Firm:
Tsuyoshi Sato
Kiyoshi Ogawa
Kiyoshi Ogawa