Title:
AMPLIFYING CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2021/117375
Kind Code:
A1
Abstract:
An amplifying circuit (100) comprises: a first amplifier (10) disposed between an input terminal (t1) and an output terminal (t2); and a second amplifier (20) connected in parallel with the first amplifier (10) between the input terminal (t1) and the output terminal (t2), wherein: the first amplifier (10) includes cascode-connected transistor (M1) and transistor (M2); the second amplifier (20) includes a transistor (M3); the transistor (M1) has a gate connected to the input terminal (t1) and also has a source and a drain both connected to the ground; the transistor (M2) has a gate, a source connected to the drain of the transistor (M1), and a drain connected to the output terminal (t2); and the transistor (M3) has a gate connected to the input terminal (t1), a source connected to the ground, and a drain connected to the output terminal (t2).
Inventors:
SUGIYAMA KOUDAI (JP)
Application Number:
PCT/JP2020/040983
Publication Date:
June 17, 2021
Filing Date:
October 30, 2020
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H03F1/22; H03F1/32; H03F1/52; H03F3/189; H03F3/68
Domestic Patent References:
| WO2008068809A1 | 2008-06-12 |
Foreign References:
| JP2017531407A | 2017-10-19 | |||
| JP2012521670A | 2012-09-13 | |||
| US20180323752A1 | 2018-11-08 | |||
| JP2011151771A | 2011-08-04 | |||
| US20060119435A1 | 2006-06-08 |
Attorney, Agent or Firm:
YOSHIKAWA, Shuichi et al. (JP)
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