Title:
CHIP PACKAGE AND PREPARATION METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2021/196012
Kind Code:
A1
Abstract:
Provided in the present application are a chip package and a preparation method therefor. The chip package comprises: a chip, the upper surface of the chip being provided with at least one first pad and at least one second pad; a device layer, which comprises a first insulating layer, at least one conductive column, and an integrated passive device (IPD), the first insulating layer being provided above the chip, the at least one conductive column penetrating the first insulating layer and being provided above the at least one first pad, and the IPD penetrating the first insulating layer and being provided above the at least one second pad; a wiring layer, which is provided above the device layer; and at least one third pad, which is provided above the wiring layer, the at least one conductive column being connected to the at least one third pad by means of the wiring layer. The described chip package can ensure the yield of chips on the basis of reducing parasitic capacitance.
Inventors:
LU BIN (CN)
SHEN JIAN (CN)
SHEN JIAN (CN)
Application Number:
PCT/CN2020/082565
Publication Date:
October 07, 2021
Filing Date:
March 31, 2020
Export Citation:
Assignee:
SHENZHEN GOODIX TECH CO LTD (CN)
International Classes:
H01L23/48; H01L21/44; H01L21/50; H01L25/00; H01L25/04; H01L25/065
Foreign References:
| CN108428684A | 2018-08-21 | |||
| US20110285007A1 | 2011-11-24 | |||
| CN106169466A | 2016-11-30 | |||
| US9269595B2 | 2016-02-23 | |||
| CN110634824A | 2019-12-31 | |||
| JP2005108929A | 2005-04-21 |
Attorney, Agent or Firm:
LONGSUN LEAD IP LTD. (CN)
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