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Patent Searching and Data


Title:
COLUMNAR SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2021/005842
Kind Code:
A1
Abstract:
According to the present invention, P+ layers 32b, 32e that cover the entire top sections of Si columns 6b, 6e and that surround the Si columns 6b, 6e with an equal width in plan view are formed through self-alignment to the Si columns 6b, 6e, W layers 33b, 33e are then formed on the P+ layers 32b, 32e, a band-shaped contact hole C3 that is in contact with partial regions of the W layers 33b, 33e and that extends in the Y direction is then formed, and a power supply wiring metal layer Vdd is formed by filling the band-shaped contact hole C. In plan view, partial regions of the W layers 33b, 33e are shaped so as to protrude to the outside of the band-shaped contact hole.

Inventors:
HARADA NOZOMU (JP)
Application Number:
PCT/JP2020/012471
Publication Date:
January 14, 2021
Filing Date:
March 19, 2020
Export Citation:
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Assignee:
UNISANTIS ELECT SINGAPORE PTE (SG)
HARADA NOZOMU (JP)
International Classes:
H01L21/8244; H01L27/11
Domestic Patent References:
WO2017208486A12017-12-07
WO2018123823A12018-07-05
WO2009096465A12009-08-06
Foreign References:
JP2016021590A2016-02-04
JP2013069770A2013-04-18
Attorney, Agent or Firm:
TANAKA Shinichiro et al. (JP)
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