Cross Reference to Related Appjicatidn [0001] This application claims priority of U. S. Provisional Patent Application No.

60/409, 893 Bled on September 10, 2002 entitled "Combination Triangular Waveform Generator and Triangulai to Psendo-Sinusoi dal Waveform Converter Circuit" and the teachingsthereofareincorporatedhereinbyrefercnce.

BackgroundoftheInvention [0002] Waveform generators are widely used in switching power supply devices, function generators, filter tuning circuitry and motor driving devices.

[0003] A conventional sinusoidal waveform generator generally comprises two stages.

The first stage is a triangle-waveform generator and the second stage is a converter which converts the triangular wavelbrm to a sinusoidal waveform. The triangular wavefonn generator generally comprises a current source, a polarity switch and a means of capacitance, such as one or a plurality of capacitors. The triangalar-to-sinusoidal converter generally comprises several diodes and resistors. The triangular-to-sinusoidal converter takes advantage of a diode's nonlinear function to rectify and shape the waveform.

[00041 Disadvantaaeously, the nonlinear functions of the diodes in the conventional triangular-to-sinu. soidal converter typically require as many current paths as there are diodes. As a result, the triangular-to-sinusoidal converter has high power consumption, Further, the number of diodes and resistors in the triangular-to-sinusoidal converter affects the surface area of the converter. In addition, an integrator, which requires a device with e capacitance, also affests the sL : Eace area. Not surprisingly tb. en, the surface area. is typically large in comparison to the surface area taken by other elements in a circuit.

(0005) More specifical. ly, the conventional triangular-to-sinusoidal converter comprises several sub-stage elements. The first sub-stage element comprises an up-down counter with an input and output. A continuous triangular wave is fed into the up-down counter input and converted into a digital triangular wave which is made available on its output. A, second sub-stage clement is coupled to the output of the first sub-stage element. The second sub-stage element is a read only memory ("ROM"), also having an input and an output.

The digital triangular waveform is taken : from the output of the first sub-stage element and is fed into the input of the ROM. The digital triangular wave is converted mto a digital sinusoidal waveform and made available on the output of the ROM. A third sub-stage element coupled to the output of the second sub-stage element is a digital-to-analog converter. The third sub-stage element accepts the digital sinusoidal waveform and converts it to a. continuous analog sinusoidal waveform at the output. The fourth sub-stage element is a post analog niter with an input and an output. It accepts the continuous 'sinusoidal waveform on the input and outputs a smoother sinusoidal signal. As noted, the sinusoidal waveform generator disadvantageously requires a large surface area for the placement of its constituent component's. The high power consumption of the tliangularto- sinusoidal waveform genérator is attributable to the requirements of the up-down counter, read only memory, digital to analog converter and post analog filter.

SummaryoftheInvention [0006] Because of the surface area and power consumption disadvantages of the conventionaltriangular-to-sinusoidalwaveformconvertercircuit , asmall,fairly non-complex triangular waveform generator and pseudo-sinusoidal waveform converter circuit is desired. The present invention comprises a triangular voltage waveform generator and triangular to pseudo-sinusoidal current waveform converter. The outputs of the present invention are preferably differential, although the invention can easily be modified for s'mgle ended outpat, The frequency of the output waveforms co. rresponds to the frequency of the input reference clock.

[0007] the present invention can be viewed as being comprised of three sub-circuits.

The ftrst sub-circuit is a triangular wavefoixn gcnerator for-the generation of triangular waveforms. The second sub-circuit is an amplitude control circuitry that controls the amplitude of tr. iangulax waveform needed to generatc a pseudo-sinusoidal wavefonn. The third sub-circuit is a reference voltage circuit which controls the amplitude control circuitry. This third sub-circuit is operable to generate reference voltages for the peak voltages of the triangular waveform.

[0008] The present invention advantageously utilizes one circuit to generate two kinds of wave. forms, Thc triangular waveform voltage is generated from an external digital clock and its current is controlled by the circuitry of the present invention. Further, the common voltage of the triangular waveforms is self-controlled by the circuit using feedback.

[0009] This circuit topology can also be utilized as a differential current mirror. The pseudo-sinusoidal waveform current is converted from a triangular waveform by the trianguler waveform converter to a pseudo sintsoidal wavefomm in the circuit.

Brief Description of the Drawings Lo°tol Figure 1 is an overall block diagram of triangular waveform generator and the triangular to pseudo-sinusoidal waveform converter of the present invention ; [0011] Figure 2 is a circuit diagram of the sinusoidal waveform and triangular waveform generator ; (00121 Figure 3. is a circuit diagram of the reference voltage generator ; fox131 Figure 4 is a circuit diagram of a voltage to current converter utilizing a NOT gate switch ; [0014] Figure 5 is a circuit diagram of a voltage to current converter ; [0015] Figure 6 is a circuit diagram of a current comparator and current generator as seen in Figure 1 ; and [0016] Figure 7 is a timing diagram of the present invention.

Detailed Description of the Present Invention [00171 The present invention comprises two waveform generators, a reference voltage generator and amplitu. de control circu. try. Generally, a separate reference clock signal is applied to the input of each of the two waveform, generators, tlaere being a 90 degree phase difference between the two clock signals. Further, reference currents are supplied to the two waveform generators from the amplitude control circuitry. The waveform generators combine the reference currents and the clock signals into two triangular waveforms with 90 degrces phase difference. The reference currents determine the amplitude of the triangular waveform.

100181 Two reference voltages, one for high side, the other for the low side, are generated in the reference voltage circuitry. The two reference voltages are supplied to the amplitude control circuitry which generates the reference currents to compare to fhe triangular waveform amplitude. The amplitude control. circuitry also rectites the triangular waveform and derives the amplitude of the triangular waveform. It continuously compares the reference voltage to the amplitude of the triangular waveform to control the supply of the reference currents for the waveform generator. The amplitude control circuitry is operable to ensure that the amplitude of the triangular waveform remains constant.

[0019] The second sub-circuit comprises the voltage-to-currcnt converter, rectihcr and current comparator. As noted, two triangular waveforms are generated. by the triangular waveform generators. These two triangular waveforms have 90 degree of phase offset from each other and have same amplitude. The waveform voltages and reference voltages are converted into current signals by the voltage to current converter. The value of the triangular waveform amplitude is added to the absolute value of each triangular waveforms in the rectifier. This derived amplitude is compared to the converted cuIrent from the reference voltages. The comparator, which has limited gain, directly controls the reference current of the waveform generator. The advantage of this method is that the amplitude of the triangular wavefonn can be compared. to the reference voltage continuously. This method results in high rectifier efficiency.

[00201 The conventional method of generating a pseudo-sinusoidal waveform corapares both peaks of the triangular waveform to the reference voltage for a moment. As such, the conventional method requires an integrator at the compared output due to the need of the comparator to compare the amplitude of the triangular waveform to the reference voltage in discrete time. Because the comparator has limited speed, the short time comparison causes a. frequency dependence of the amplitude.

[00211 The third sub-circuit of the present invention comprises the sinusoidal waveform converter. A maximum peak to peak voltage of the triangular waveform has to be an. appropriate input voltage : fbr the sinusoidal waveform converter. The appropriate input voltage for the sinusoidal waveform converter is defined as the maximum voltage that will not saturate the output current of the sinusoidal'waveform converter. Consequently, the level of current that will not saturate the output current of the sinusoidal waveform is the maximum output current.

[0022] In operation, target differential currents arc input into the output nodes of the sinusoidal waveform converter. The objective appropriate input voltage is the balance of the target output current with input current provided, by a feed-back connection. The foregoing operation of the present invention is more specifically described in the following detailed descriptions of the drawings.

[00231 As seen in Figure 1, clock signal A 102 and clock signal B 103 are input to the core of the waveform generators 170 and 180. These clock signals have 90 degrees phase difference as seen in Figure 7A and Figure 7B. Reference currents 104 and 105 are input to the core of the waveform generators 170 and 180. The core of the waveform generators 170 and 180 generate triangular wave. tbrms 140,150 and sinusoidal waveforms 130 and 131 as also seen in Figure 7for, from input currents 104 and 105 and clock signal 102 and clock signal 103. These triangular waveforms, as also seen iu Figure 7C and Figure 7D have same, amplitude, and 90 degrees phase difference. The triangular waveforms 140 and 150 are provided to the inputs of the voltage-to-current converters 106 and 107. In addition, reference voltage 160 is generated in the reference voltage generator 110. The reference voltages 160 are input to the voltagc-to-current gene, rator 110. Currents from the voltage-to-cul t generator 110 and from the core of the waveform generators 170 and 180 are input to switches inside of the voltage to current converters 106 and 107. The respective switches are driven by the other side's clock signal 103 and 102. This configuration controls the absolute value of the output, as seen in Figures 7E and. 7F. Output currents from voltage-to-currcnt generators 106, 107 and 110 are summed at node 108, as seen in Figure 7G and are provided to the input of the current comparator and current bias generator 120. The current comparator therein compares the input differential currents at input 109. If the current is less than 0, a current bias generator within current comparator andcurrentbias generator120increases thereference currents104 and 105. Assuch,the amplitudeoftriangularwaveformwillbeincreased.

[0024] The equationsgoverningrectifieroperationisasfollows: Triangularwaveform (tri)phase=0 <BR> <BR> <BR> <BR> tri(#)=#+½@-###<0<BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> tri(#)=-#+½@ 0##<#<BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> Triangularwaveform (tri)phase=#<BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> tri(#+#)=-#-1@-###<-#<BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> tri(#+#)=#@-###<#<BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> tri(#+#)=-#+1@###<# Thiscalculationresultsin the following: <BR> <BR> <BR> <BR> <BR> <BR> <BR> #tri(#)#+#tri(#+#)#=-(#+½)-(-#-1)=½@-###<-#<BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> #tri(#)#+#tri(#+#)#=(#+½)-(#)=½@-###<0<BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> #tri(#)#+#tri(#+#)#=(-#+½)+(#)=½@###<#<BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> <BR> #tri(#)#+#tri(#+#)#=-(-#+½)+(-#+1)=½@###<# [0025]Thebiasvoltageisgeneratedinthecurrentbiasgeneratorofcu rrentcomparator and current bias generator 120.

[0026) The circuitry of waveform generator 170 is shown in Figure 2. As seen in Figure 2, the terms top and torn refer to the nodes for the triangular waveform differentia voltage outputs. The terms sop and som refer to the nodes for the sinusoidal differential current waveform outputs. As seen in Figure 2, the current to charge the capacitor 201 is generated with transistor 210 from the bias voltage. The capacitor 201 is connected as differential. It can be easily modified as single-ended. For example, two capacitors are connected between top and GND and between torn and GND. All transistors used herein are preferably MOSFETs, although other transistor compositions can be used. The current is defined as Ir. A clock signal is provided to the circuit at input pin. elk. The clock signal is supplied to the gate of transistor 212 for switching. The inverted clock signal is supplied to gate of transistor 211 for switching. As seen in Figure 2, the sources of transistor 211 and transistor 212 are coupled. In operation, if transistor 211 is on, then transistor 222 is off, because when elk is high, the inverter output is low. Current Ir flows from the source of transistor 211 through the drain of the transistor 211. The source coupled transistor 211 and transistor 212 result in a differential current. It is this differential current that charges capacitor 201. As a result, voltage at the node top 220 is increased. The drain current of transistor 215 and transistor 216 are equal, because the both gate-source voltages are equal. Transistors 215 and 216 generate common current. In order to increase the voltage of the node top 220, the gate-source voltage of transistor 215 and transistor 216 must increase because the coupled sources of transistor 213 and transistor 214 are connected to the gates of transistor 215 and transistor 216. When the voltage of tom is decreased, the drain current of transistor 216 charges capacitor 201 and the voltage at node torn 222 is decreased-The differential voltage across capacitor 2. 01 thus increases and the drain current of transistor 213 increases. The drain current of transistor 214 decreases as the voltage across capacitor 201 increases. The differential voltage across capacitor 201 is first order linear, because a constant current charges the capacitor 201. The drain current of transistor 213 and transistor 214 is given by the di5crential transistor pair V-1 characteristic, because the differential voltage between the gate of transistor 213 and the gate of transistor 214 increases in a linear first order manner. The current'through transistor 213 increases from point A. to point B as seen in Figc 71i.

[0027] If transistor 212 is on-and transistor 211 is off, the current Ir flows from the source of transistor 212 through the drain of transistor 212. From there, the same operation as described above occurs. The current through transistor 213 is decreased from point # to point C as seer) in Figure 71i.

[0028] Figure 3 illustrates current Ir supplied by current generator transistor 310 which is controlled by the bias voltage that is generated in current bias generator of current comparator and current bias generator 120 of Figure 1. Transistor 313 and transistor 314 as seen ill Figure 3 correspond to the main differential pair transistors 213 and 214 as seen in Figure 2. Transistor 315 in Figure 3 corresponds to transistor 215 of Figure 2.

[0029] "lt" refcrs to the tail current for maximuin output current of the sinusoidal current waveform. It can be controlled to set the current amplitude of the sinusoidal, waveform. Current It of current source 320 in Figure 3 is same current as It as seen in.

Figure 2. Transistor 313 and transistor 314 share the current It from current source 320 as seen. in Figure 3. The current Tt*a from flows through transistor 313. The current It a is mirrored by the current mirror generator transistor 311 to transistor 312. The current Itt (2*a-l) is subtracted from the mirrored current lt*a. Finally, transistor 314 shares part of current It a) In operation, the gate-source voltages of transistor 313 and transistor 314 arc determined. The"a"refers to the distortion control coefficient. The value of"a."is set for the appropriate amplitude of the tri. angular waveform. Tf"a"is 99%, the current ratio of transistor 313 to transistor 31. 4 is 99: 1, and transistor 314 is slightly ON. The current ratio of transistor 313 and transistor 314 determines the voltage difference between node VH 330 and node VL331. When "a" is a large ratio that is. less than 100%, VH-VL refers to the maximum peak-to-peak voltage of the triangular waveform.'When"a"is a small ratio that is more than 0%, VL-VH refers to the maximtun peak-to-peak voltage of the triangular waveform. In order to reduce the MOShBTs back-gate ef. feet on transistor 313 and transistor 314, the gate-source voltage of the transistor 315 in Figure 3 must have the same gate-source voltage of transistor 315 in Figure 2. Current Ir from transistor 310 generates the same gate-source voltage of transistor 315 as the gate-source voltage of transistor 315 as seen in Figure 2.

[0030] Figure 4 illustrates the voltage-to-current converter and the switches necessary to rectify the triangular waveform. The transistor 410, transistor 411, transistor 412 and transistor 41. 3 are employed as switches to transmit currents directly or to exchange currents. As seen in Figure 4, the triangular waveform differential voltages are input to node inp 420 and node inm 421. Also as seen therein, node inp 420 and node inm 421 are connected to gates of transistor 414 and transistor 415. Resistor 430 is coupled to the sources of transistor 414 and transistor 415. The differential input voltage appears as the voltage across resistor 430. Resistor 430 generates a current that is proportional to the differential input voltage. The current flows through the sources through the drains of transistor 414 and transistor 415. As seen in Figure 4,"sw"refers to the input for swapping the polarity of the output cmrents. When node sw 422 is high transistor 410 and transistor 41] turn off and transistor 412 and transistor 413 turn on. When the input at node sw 422 is low, the current flows in transistors 410, or transistor 411 to node op 423 and node om 424.

The terms om and op refer to the current output. When the input at node sw 422 is high, the cuircnt flows in transistors 412 or transistor 413, to node om 422 and node op 423.

[0031] Figure 5 illustrates the operation of the voltage-to-current converters. The reference differential voltages are input to node inpgm 520 and node inmgm 521. As seen therein, node inpgm. 520 and node inmgm 521 are connected to the gates of transistor 510 and transistor 511. Resistor 530 is coupled to the sources of transistor 510 and transistor 511. The differential input voltage appears as the voltage across resistor 530. Resistor 530 generates a current that is proportional to the input differential reference voltage. The current flows through the source to the drain of transistor 510 and transistor 511, to node opgm 522 and node omgm 523.

[00321 Figure 6 illustrates the current comparator and current bias voltage generator 120 of Figure 1. As seen therein, current is applied at node ip 620 and node im 621. The current inpltt from node ip 620 is inirrored by current mirror generator transistor 610 to transistor 611.

[00331 The mirrored current is also mirrored by current mirror transistor 616 to transistor 617. The current input at node im 621 is mirrored by current mirror transistor 612 to transistor 613. In operation, the current mirrored by transistor 617 subtracts from the current mirrored by transistor 613. The node cmpo 640 is an output of the current comparator that has high output resistance. Node cmpo 640 has a Suite output resistance that is determined by the parallel output resistance of transistor 617 and transistor 613. This Unite output resistance determines the trans-resistance of this comparator. The trans-conductance of the voltage-to-current converter and this trans-resistance makes a finite gain of the comparator on node cmpo 640. The voltage of the node cmpo 640 generates a reference current with the resistor 630. The current generates the reference Mas voltageofthecoreofthetriangularwaveformgenerator.