Title:
COMPARATOR, OSCILLATOR, AND POWER CONVERTER
Document Type and Number:
WIPO Patent Application WO/2022/045106
Kind Code:
A1
Abstract:
A differential amplification circuit (110) generates a first current (I1) and a second current (I2) that have a current difference that is the result of amplifying the voltage difference between an input voltage (Vin) and a reference voltage (VREF). An output stage (170) supplies a current (I6p) that is proportional to the first current (I1) to an output node (N6). A current conversion circuit (140) discharges a current (I4n) that is proportional to the second current (I2) from the output node (N6). A latch circuit (160) connects the output node (N6) to a ground node (Ns) in accordance with a reset signal (RST) and then, after reset release, disconnects the output node (N6) from the ground node (Ns). When the voltage of the output node (N6) rises from a ground voltage (VSS) at the time of the reversal of the high-low relationship between the input voltage (Vin) and the reference voltage (VREF) from the time of the reset release, the latch circuit (160) fixes the voltage of the output node (N6) at a power supply voltage (VDD) by means of a positive-feedback latch operation.
Inventors:
KOJIMA TOMOKAZU (JP)
MORIMOTO YUHEI (JP)
MORIMOTO YUHEI (JP)
Application Number:
PCT/JP2021/030922
Publication Date:
March 03, 2022
Filing Date:
August 24, 2021
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
H03K5/08; H03F3/45
Foreign References:
| JP2001285037A | 2001-10-12 | |||
| JP2002237743A | 2002-08-23 | |||
| JP2008153866A | 2008-07-03 | |||
| JP2009524327A | 2009-06-25 | |||
| JP2014075744A | 2014-04-24 | |||
| JP2002084742A | 2002-03-22 |
Attorney, Agent or Firm:
FUKAMI PATENT OFFICE, P.C. (JP)
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