A CURRENT BLOCKING STRUCTURE TO IMPROVE SEMICONDUCTOR LASER PERFORMANCE Background to the Invention Buried heterostructure semiconductor lasers have the advantages of operating at low lasing threshold current, high temperature, and providing stable fundamental lateral mode lasing at high optical output. A prior art double-channel planar buried-heterostructure (DC-PBH) laser diode utilizing the p-n-p-n current confinement structure has been demonstrated with GaAs to enhance the current confinement to the active layer [W. T. Tsang, R. A. Logan, and J. P. van der ziel,"A new lateral selective-area growth by liquid-phase epitaxy: The formation of a lateral double-barrier buried-heterostructure laser", Appl. Phys. Lett., vol. 40, pp. 942-944, 1982. ]. Figure 1 shows the layer structure of a similarly configured DC-PBH laser diode based on InP [T. Numai, M. Fujiwara, N. Shimosaka, K. Kaede, M. Nishio, S. <BR> <BR> <P>Suzuki, and 1. Mito, "1. 5, um H4-shifted DFB LD filter and 100 Mbit/s two-channel wavelength signal switching", Electron. Lett., vol. 24, pp. 236-237,1988.]. It consists of an n-InP substrate 11, an n-InP buffer layer 12, an undoped-InGaAsP active layer 13, a p-lnP cladding layer 14, a p-InP current blocking layer 15, an n-InP current blocking layer 16, a p-InP cladding layer 17, and a p-InGaAsP contact layer 18.

Owing to the internal current confinement structure, the DC-PBH laser diode does not require any stripe electrodes and permits a p-type metal contact to be formed on the whole top surface of the contact layer, and thus simplifies the fabrication process and offers high yield. However, the p-n-p-n current confinement structure has a relatively large capacitance, which will lead to a large displacement current flow through the p-n-p-n junction at high frequency operation. Furthermore, a current leakage path exists between the p-InP cladding layer 14 and p-InP current blocking layer 15 to the n-InP buffer layer 12. This leakage current will also cause optical power saturation when the laser is operated at high temperature or at high power output U. S. Patent No. 4,597, 085 discloses a technique, whereby an undoped-InP layer 26a, as shown in Figure 2, is inserted into the current confinement structure to reduce the capacitance between the p-n junction. In this disclosure the undoped- InP layer 26a either forms an n-type layer with an impurity concentration of around 5 10's cm 3, or a p-type layer with the same impurity concentration due to compensatory dispersion of p-dopant from the p-InP blocking layer 25 during epitaxial growth. With this layer, it reduces the effect of the impurity concentration of

n-InP blocking layer 26 on the junction capacitance, and hence lowers the overall capacitance of the p-n-p-n current confinement structure.

Although the undoped-InP layer 26a is able to lower the impurity concentration on one side of the p-n junction, the impurity concentration is still in the range of ~ 1016 cm~3. In addition, this disclosure does not address the issue of the leakage current from the active region to the p-n-p-n confinement layers. As can be seen in Figure 2, the p-InP cladding layer 24 is connected directly to the p-InP blocking layer 25, which will cause a large leakage of current, resulting in reduction in efficiency and deterioration in high-power performance of semiconductor laser.

Therefore, from the above, the design of the layer structure, especially the p- n-p-n confinement structure, should be improved in order to achieve high frequency, high temperature and high output power operation.

Summary of the Invention According to one aspect of the present invention, a semiconductor laser having a double-channel planar-buried-heterostructure (DC-PBH) formed on a substrate comprises: a buffer layer of a first compound semiconductor material of a first conductivity type (n-type) formed on the substrate; an active layer formed on the buffer layer, the active layer capable of light generation by laser action; a first cladding layer of a second compound semiconductor material of a second conductivity type (p-type) formed on the active layer ; a first channel and a second channel extending through separate regions of the first cladding layer, the active layer and into the buffer layer, the first and second channels thereby defining an active region disposed between them, each of the first channel and second channel having a structure comprising: a first current blocking layer of a third compound semiconductor material of the second conductivity type formed on the buffer layer ; an intermediate layer of a fourth compound semiconductor material formed on the first current blocking layer ; and, a second current blocking layer of a fifth compound semiconductor material of the first conductivity type formed on the intermediate layer ; each of the first current blocking layer, intermediate layer and second current blocking layer extending over an upper surface of the first cladding layer except for the portion in the active region;

a second cladding layer of a sixth compound semiconductor material of the second conductivity type formed on the second current blocking layer and covering the upper surface of the first cladding layer in the active region; and, a contact layer of a seventh compound semiconductor material of the second conductivity type formed on the second cladding layer, wherein the fourth compound semiconductor, which forms the intermediate layer, is doped with a dopant to reduce junction capacitance and to reduce current leakage through the channel structure.

Preferably, the second compound semiconductor, which forms the first cladding layer ; is substantially intrinsic (undoped) to reduce current leakage from the active region.

Preferably, the first and second channels comprise a further current blocking layer of an eighth compound semiconductor interposed between the buffer layer and the first current blocking layer and extending over the same area as the first current blocking layer, said eighth compound semiconductor being doped with a dopant to reduce current leakage from the active region both across a channel and through a channel.

According to another aspect of the present invention, a semiconductor laser having a double-channel planar-buried-heterostructure (DC-PBH) formed on a substrate comprises: a buffer layer of a first compound semiconductor material of a first conductivity type (n-type) formed on the substrate; an active layer formed on the buffer layer, the active layer capable of light generation by laser action; a first cladding layer of a second compound semiconductor material of a second conductivity type (p-type) formed on the active layer ; a first channel and a second channel extending through separate regions of the first cladding layer, the active layer and into the buffer layer, the first and second channels thereby defining an active region disposed between them, each of the first channel and second channel having a structure comprising: a first current blocking layer of a third compound semiconductor material of the second conductivity type formed above the buffer layer ; an intermediate layer of an undoped fourth compound semiconductor material formed on the first current blocking layer ; and, a second current blocking layer of a fifth compound semiconductor material of the first conductivity type formed on the intermediate layer ;

each of the first current blocking layer, intermediate layer and second current blocking layer extending over an upper surface of the first cladding layer except for the portion in the active region; a second cladding layer of a sixth compound semiconductor material of the second conductivity type formed on the second current blocking layer and covering the upper surface of the first cladding layer in the active region; and, a contact layer of a seventh compound semiconductor material of the second conductivity type formed on the second cladding layer, wherein the first and second channels comprise a further current blocking layer of an eighth compound semiconductor interposed between the buffer layer and the first current blocking layer, and extending over the same area as the first current blocking layer, said eighth compound semiconductor being doped with a dopant to reduce current leakage from the active region both across a channel and through a channel.

Preferably, the second compound semiconductor, which forms the first cladding layer, is substantially intrinsic (undoped) to reduce current leakage from the active region.

Preferably, the fourth compound semiconductor, which forms the intermediate layer, is doped with a dopant to reduce junction capacitance and to reduce current leakage through the channel structure.

According to a further aspect of the present invention, a semiconductor laser having a double-channel planar-buried-heterostructure (DC-PBH) formed on a substrate comprises: a buffer layer of a first compound semiconductor material of a first conductivity type (n-type) formed on the substrate; an active layer formed on the buffer layer, the active layer capable of light generation by laser action; a first cladding layer of a second compound semiconductor material formed on the active layer ; a first channel and a second channel extending through separate regions of the first cladding layer, the active layer and into the buffer layer, the first and second channels thereby defining an active region disposed between them, each of the first channel and second channel having a structure comprising: a first current blocking layer of a third compound semiconductor material of a second conductivity type (p-type) formed above the buffer layer ; an intermediate layer of an undoped fourth compound semiconductor material formed on the first current blocking layer ; and,

a second current blocking layer of a fifth compound semiconductor material of the first conductivity type formed on the intermediate layer ; each of the first current blocking layer, intermediate layer and second current blocking layer extending over an upper surface of the first cladding layer except for the portion in the active region; a second cladding layer of a sixth compound semiconductor material of the second conductivity type formed on the second current blocking layer and covering the upper surface of the first cladding layer in the active region; and, a contact layer of a seventh compound semiconductor material of the second conductivity type formed on the second cladding layer, wherein the second compound semiconductor, which forms the first cladding layer, is substantially intrinsic (undoped) to reduce current leakage from the active region.

Preferably, the first and second channels comprise a further current blocking layer of an eighth compound semiconductor interposed between the buffer layer and the first current blocking layer and extending over the same area as the first current blocking layer, said eighth compound semiconductor being doped with a dopant to reduce current leakage from the active region both across a channel and through a channel.

Preferably, the fourth compound semiconductor, which forms the intermediate layer, is doped with a dopant to reduce junction capacitance and to reduce current leakage through the channel structure.

Preferably, the dopant is Iron (Fe) or Ruthenium (Ru).

Preferably, the active layer comprises undoped indium gallium arsenide phosphide (undoped-InGaAsP).

Preferably, the active layer comprises a quantum-well structure. Preferably, the quantum well structure is sandwiched between graded index confinement layers.

Preferably, the substrate comprises a layer of n-type indium phosphide (n- InP) and each of the first, third, fourth, fifth and sixth compound semiconductor materials are indium phosphide (InP) and the seventh compound semiconductor material is indium gallium arsenide phosphide (InGaAsP).

Preferably, the second compound semiconductor is indium phosphide (InP).

Alternatively, the second compound semiconductor is indium gallium arsenide phosphide (InGaAsP).

Preferably, the eighth compound semiconductor is indium phosphide (InP).

Brief Description of the Drawings Examples of the present invention will now be described in detail with reference to the accompanying drawings, in which: Figure 1 shows the layer structure of an example of a conventional DC-PBH semiconductor laser ; Figure 2 shows another example of a conventional DC-PBH semiconductor laser having an un-doped InP layer within a p-n-p-n confinement structure; Figure 3 is a schematic diagram showing the capacitances across the p-n-p-n junctions; Figure 4 is a schematic diagram of a p-n-p-n confinement structure illustrating leakage current paths; Figure 5 is an example of a DC-PBH semiconductor laser structure in accordance with a first aspect of the present invention; Figure 6 is an example of a DC-PBH semiconductor laser structure in accordance with a second aspect of the present invention; and, Figure 7 is an example of a DC-PBH semicondictor laser structure in accordance with a third aspect of the present invention.

Detailed Description One of the major concerns with the DC-PBH laser diode in high frequency operation is its capacitance across the p-n-p-n junction. Figure 3 shows the equivalent capacitances (Cl, C2, and C3) of the p-n-p-n junction. Each capacitance of the p-n junction Ci (i = 1,2 and 3) is expressed by the following equation: Cj = (qss/2) x NAND/ (NA+No) 1/ (Vb. V) where q is the electron charge, es is the dielectric constant, Veb ; is the built-in potential, V is the applied voltage, NA is the acceptor concentration, and No is the donor concentration. The""sign in the above equation denotes the use of"+"for forward bias and"-"for reverse bias. The junction capacitance Cp-n-p-n is obtained as a series connection of the capacitances C1, C2, and C3. When a forward bias is applied across the laser diode, only the middle p-n junction is subjected to a reverse bias. Therefore, capacitance C2 is the smallest and is essentially the main quantity that determines the junction capacitance Cpn If the applied voltage V is a fixed value, the junction capacitance CP__P_ will depend on the impurity concentration NA

and ND. Hence, it is very desirable to lower the capacitance Ca so as to bring down the overall junction capacitance Cp-n-p-n.

Besides that, the leakage current flowing through the p-n-p-n current blocking layer in the DC-PBH laser diode should also be minimized for better device performance, particularly in high output power operation. As pointed out by US Patent no. 6,229, 836 for the DC-PBH laser diode, there are two paths that the leakage current may flow. The first path is the flow through the channel via n-InP blocking layer 46 and p-InP blocking layer 45 as shown in Figure 4. The other path is the flow through the p-InP blocking layer 45 to the undoped-InGaAsP layer 43.

Figure 5 illustrates a device structure in accordance with one aspect of the present invention. The structure is essentially the same as that described above, except for an additional layer of Fe-doped InP layer 55a inserted between n-lnP blocking layer 56 and p-InP blocking layer 55. This Fe-doped InP layer 55a will create an acceptor level (Fe3+/Fe2+) near mid-band gap. The iron impurities are deep level traps, and will make the capacitance C2 less dependent of the impurity concentration of layer 56, which is normally doped with a concentration larger than 1 101$ cm 3 to lower the leakage current from p-InP blocking layer 57 to p-InP blocking layer 55 that does not contribute to light emission. The capacitance C2 and hence the overall capacitance Cp n p n will be reduced with this Fe-doped InP layer 55a, and consequently the displacement current through the current blocking structure during high speed operation will be lowered. In addition, as this Fe-doped In layer is also a thermally stable semi-insulating material, a high resistivity layer is thus formed between the n-InP blocking layer 56 and p-InP blocking layer 55. Thus, this Fe-doped InP layer will also effectively reduce the leakage current flowing through the p-n-p-n current blocking channel as mentioned above.

When the active layer 53 is based on a quantum well structure, graded-index confinement layers (not shown) are provided above and below the active layer 53, for example, layers of InGaAsP. The confinement layers should be substantially intrinsic. However, each could be a single material with a single composition, and hence a uniform refractive index profile, or a multilayer material having a varying composition, and hence a graded refractive index profile for improved optical confinement.

In another aspect of the present invention we seek to reduce the high leakage current from the active region to the p-n-p-n confinement layers. Here, as shown in Figure 6, a Fe-doped InP layer 65a is inserted in between the p-InP blocking layer 65 and the n-InP buffer layer 62. As mentioned before, this Fe-doped

InP layer will act as a free carrier-trapping source and presents itself as a high resistivity layer. Therefore, it will decrease the leakage current from the active layer through the p-n-p-n confinement structure to the n-type buffer (both through p-InP blocking layer 65 to n-InP buffer layer 62, as well as to undoped active InGaAsP layer 63). Moreover, for the case of high output power operation, the leakage current through the p-n-p-n confinement structure near to the mesa waveguide might be large due to the increased optical generation of minority carriers from the emitted light spreading out of the waveguide. With this high resistivity Fe-doped layer incorporated in the p-n-p-n structure, the increase of the leakage current through the p-n-p-n layer from the above route will be greatly minimized, as compared to the conventional p-n-p-n layer.

A further aspect of the present invention addresses the leakage current problem from the active region. Here, as shown in Figure 7, the top p-lnP cladding layer 74 is replaced by an intrinsic layer, such as an undoped graded index (GRIN) InGaAsP layer. The leakage current path from the p-doped InP layer 77 through this undoped layer 74 to p-lnP blocking layer 75 will be reduced significantly, as compared to a p-doped InP layer in the prior art.

It should be emphasised that the above described three inventions work singly and independently to improve the performance of a prior-art DC-PBH laser diode. In addition, enhanced performance can be obtained by incorporating a combination of either at least two of the inventions or an integration of all the three inventions.