Title:
DETECTION DEVICE, AND SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2020/084407
Kind Code:
A1
Abstract:
The present invention reduces the power used by a semiconductor device. The present invention is a semiconductor device having a latch circuit formed by a dynamic circuit. The latch circuit has: a first circuit having a decoding function; a plurality of capacitance elements; a plurality of clock input terminals; a signal input terminal; a first output terminal; and a second output terminal. In a period in which "H" is assigned to a first clock signal, the electric potential of a first capacitance element is updated using decoding results from the first circuit. In a period in which "H" is assigned to a second clock signal, the electric potential of a second capacitance element is updated in accordance with the electric potential of the first capacitance element, and the electric potential of the second capacitance element is applied to the first output terminal as a first output signal. In a period in which "H" is assigned to a third clock signal, the electric potential of a third capacitance element is updated in accordance with the electric potential of the second capacitance element, and the electric potential of the third capacitance element is applied to the second output terminal as a second output signal.
Inventors:
HARADA SHINTARO
IKEDA TAKAYUKI (JP)
IKEDA TAKAYUKI (JP)
Application Number:
PCT/IB2019/058844
Publication Date:
April 30, 2020
Filing Date:
October 17, 2019
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H03K21/00; G11C19/28; H01L21/8234; H01L27/088; H01L29/786
Foreign References:
| JPS6010498A | 1985-01-19 | |||
| JP2000349163A | 2000-12-15 | |||
| JPS51112142A | 1976-10-04 |
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