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Title:
FILTERED ENVELOPE TRACKING
Document Type and Number:
WIPO Patent Application WO/2021/042087
Kind Code:
A2
Abstract:
Embodiments of circuit, apparatus, and method for envelope tracking are disclosed. In an example a circuit for envelope tracking can include a digital pre-distorter configured to receive an input signal representative of a signal to be transmitted. The circuit can also include a filtered envelope tracking generator configured to receive the input signal and to provide one or more output signals. The one or more output signals can include a signal that is a filtered, tracked envelope of the input signal. One of the one more output signals can be provided to the digital pre- distorter. The circuit can further include an envelope tracker configured to receive the filtered, tracked envelope and to provide an envelope tracking input to a power amplifier.

Inventors:
GENG JIFENG (US)
YANG HONG KUI (US)
Application Number:
PCT/US2020/061404
Publication Date:
March 04, 2021
Filing Date:
November 20, 2020
Export Citation:
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Assignee:
ZEKU INC (US)
International Classes:
H04J11/00
Attorney, Agent or Firm:
ZOU, Zhiwei (US)
Download PDF:
Claims:
WHAT IS CLAIMED IS:

1. A circuit for envelope tracking, the circuit comprising: a digital pre-distorter configured to receive an input signal representative of a signal to be transmitted; a filtered envelope tracking generator configured to receive the input signal and to provide one or more output signals, wherein the one or more output signals comprise a signal that is a filtered, tracked envelope of the input signal, and wherein one of the one more output signals is provided to the digital pre-distorter; and an envelope tracker configured to receive the filtered, tracked envelope and to provide an envelope tracking input to a power amplifier.

2. The circuit of claim 1, wherein the filtered envelope tracking generator comprises a real-time envelope tracking generator and a low-pass filter.

3. The circuit of claim 1, wherein the filtered envelope tracking generator comprises a multi-level envelope tracking generator and a low -pass filter.

4. The circuit of claim 3, wherein a first output signal of the one or more output signals is provided from the multi-level envelope tracking generator, a second output signal of the one or more output signals is provided from the low-pass filter, the first output signal is provided to the digital pre-distorter, and the second output signal is provided to the envelope tracker.

5. The circuit of claim 3, wherein the digital pre-distorter is configured to select a lookup table corresponding to a current level of the multi-level envelope tracking generator.

6. The circuit of claim 1, wherein the digital pre-distorter is configured to select a lookup table based on the one of the one or more output signals provided to the digital pre-distorter. 7. The circuit of claim 1, wherein the filtered envelope tracking generator comprises a voltage regulation circuit configured to maintain one of the one or more output signals at or above a predetermined voltage.

8. The circuit of claim 1, wherein the filtered envelope tracking generator comprises a boost circuit configured to increase a voltage of one of the one or more output signals by a predetermined voltage.

9. The circuit of claim 1, wherein the digital pre-distorter is configured to compensate the input signal based on characteristics of the power amplifier and the one of the one or more output signals from the filtered envelope tracking generator.

10. A method of envelope tracking, the method comprising: receiving an input signal at a digital pre-distorter, wherein the input signal is representative of a signal to be transmitted; receiving the input signal at a filtered envelope tracking generator; generating, by the filtered envelope tracking generator, one or more output signals, wherein the one or more output signals comprise a filtered, tracked envelope of the input signal; receiving at least one of the one or more output signals at the digital pre-distorter; receiving at an envelope tracker at least one of the one or more output signals; and providing an envelope tracking input to a power amplifier from the envelope tracker based on the at least one of the one or more output signals received at the envelope tracker.

11. The method of claim 10, wherein the filtered envelope tracking generator generates the one or more output signals using a real-time envelope tracking generator and a low-pass filter.

12. The method of claim 10, wherein the filtered envelope tracking generator generates the one or more output signals using a multi-level envelope tracking generator and a low-pass filter.

13. The method of claim 12, wherein a first output signal of the one or more output signals is provided from the multi-level envelope tracking generator, a second output signal of the one or more output signals is provided from the low-pass filter, the first output signal is provided to the digital pre-distorter, and the second output signal is provided to the envelope tracker.

14. The method of claim 12, further comprising: selecting, by the digital pre-distorter, a lookup table corresponding to a current level of the multi-level envelope tracking generator.

15. The method of claim 10, further comprising: selecting, by the digital pre-distorter, a lookup table based on the at least one of the one or more output signals provided to the digital pre-distorter.

16. The method of claim 10, further comprising: maintaining, by a voltage regulation circuit, one of the one or more output signals at or above a predetermined voltage.

17. The method of claim 10, further comprising: boosting, by a boost circuit, a voltage of one of the one or more output signals by a predetermined voltage.

18. The method of claim 10, further comprising: compensating, by the digital pre-distorter, the input signal based on characteristics of the power amplifier and the one of the one or more output signals from the envelope tracking generator.

19. A radio frequency (RF) chip, the chip comprising: a digital front-end comprising a digital pre-distorter configured to receive an input signal representative of a signal to be transmitted, wherein the digital front end further comprises a filtered envelope tracking generator configured to receive the input signal and to provide one or more output signals, wherein the one or more output signals comprise a signal that is a filtered, tracked envelope of the input signal, and wherein one of the one more output signals is provided to the digital pre-distorter; an envelope tracker configured to receive the filtered, tracked envelope and to provide an envelope tracking input to a power amplifier; and the power amplifier, the power amplifier configured to receive an output of the digital pre distorter and the filtered, tracked envelope.

20. The RF chip of claim 19, further comprising: an imaginary and real digital to analog converter configured to convert the output of the digital pre-distorter to analog form and to provide the analog form of the output of the digital pre distorter to the power amplifier; and an envelope tracking digital to analog converter configured to convert the filtered, tracked envelope to analog form and to provide the analog form of the filtered, tracked envelope to an envelope tracking tracker.

Description:
FILTERED ENVELOPE TRACKING

BACKGROUND

[0001] Embodiments of the present disclosure relate to apparatuses and methods for filtered envelope tracking.

[0002] Wireless communication systems are widely deployed to provide various telecommunication services such as telephony, video, data, messaging, and broadcasts. In cellular communication, such as the 4th-generation (4G) Long Term Evolution (LTE) and the 5th- generation (5G) New Radio (NR), the 3rd Generation Partnership Project (3GPP) defines a protocol stack that includes a set of layers collectively referred to as layer 2: a Packet Data Convergence Protocol (PDCP) layer, a Radio Link Control (RLC) layer, and a Medium Access Control (MAC), from higher to lower in the stack. These lie above the physical layer (PHY) in the stack. PHY is also referred to as layer 1. Data to be transmitted may be generated by an application above the protocol stack, passed down through layer 2 processing to layer 1 processing, where it is ultimately transmitted over one or more antenna.

SUMMARY

[0003] Embodiments of apparatus and method for filtered envelope tracking are disclosed herein.

[0004] In one example, a circuit for envelope tracking can include a digital pre-distorter configured to receive an input signal representative of a signal to be transmitted. The circuit can also include a filtered envelope tracking generator configured to receive the input signal and to provide one or more output signals. The one or more output signals can include a signal that is a filtered, tracked envelope of the input signal. One of the one more output signals can be provided to the digital pre-distorter. The circuit can further include an envelope tracker configured to receive the filtered, tracked envelope and to provide an envelope tracking input to a power amplifier. [0005] In another example, a method of envelope tracking can include receiving an input signal at a digital pre-distorte. The the input signal can be representative of a signal to be transmitted. The method can also include receiving the input signal at a filtered envelope tracking generator. The method can further include generating, by the filtered envelope tracking generator, one or more output signals. The one or more output signals can include a filtered, tracked envelope of the input signal. The method can additionally include receiving at least one of the one or more output signals at the digital pre-distorter. The method can also include receiving at an envelope tracker at least one of the one or more output signals. The method can further include providing an envelope tracking input to a power amplifier from the envelope tracker based on the at least one of the one or more output signals received at the envelope tracker.

[0006] In a further example, a radio frequency chip can include a digital front-end that includes a digital pre-distorter configured to receive an input signal representative of a signal to be transmitted, wherein the digital front end further comprises a filtered envelope tracking generator configured to receive the input signal and to provide one or more output signals. The one or more output signals can include a signal that is a filtered, tracked envelope of the input signal. One of the one more output signals can be provided to the digital pre-distorter. The radio frequency chip can also include an envelope tracker configured to receive the filtered, tracked envelope and to provide an envelope tracking input to a power amplifier. The radio frequency chip can further include the power amplifier. The power amplifier can be configured to receive an output of the digital pre-distorter and the filtered, tracked envelope.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments of the present disclosure and, together with the description, further serve to explain the principles of the present disclosure and to enable a person skilled in the pertinent art to make and use the present disclosure.

[0008] FIG. 1A illustrates a constant level power tracker.

[0009] FIG. IB illustrates a fast or real-time envelope tracker.

[0010] FIG. 1C illustrates a multi-level envelope tracker.

[0011] FIG. 2 illustrates a radio frequency (RF) chip, according to certain embodiments of the present disclosure.

[0012] FIG. 3A illustrates a first option for a filtered ET generator, according to certain embodiments.

[0013] FIG. 3B illustrates a first option for a filtered ET generator, according to certain embodiments.

[0014] FIG. 4 illustrates a comparison of various tracking approaches, according to certain embodiments of the present disclosure. [0015] FIG. 5 illustrates a method of envelope tracking, according to certain embodiments of the present disclosure.

[0016] FIG. 6 illustrates an example node, in which some aspects of the present disclosure may be implemented, according to certain embodiments of the present disclosure.

[0017] FIG. 7 illustrates a block diagram of an apparatus including a baseband chip, an RF chip, and a host chip, according to certain embodiments of the present disclosure.

[0018] FIG. 8 illustrates an example wireless network, in which some aspects of the present disclosure may be implemented, according to certain embodiments of the present disclosure. [0019] Embodiments of the present disclosure will be described with reference to the accompanying drawings.

DETAILED DESCRIPTION

[0020] Although specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. A person skilled in the pertinent art will recognize that other configurations and arrangements can be used without departing from the spirit and scope of the present disclosure. It will be apparent to a person skilled in the pertinent art that the present disclosure can also be employed in a variety of other applications.

[0021] It is noted that references in the specification to “one embodiment,” “an embodiment,” “an example embodiment,” “some embodiments,” “certain embodiments,” etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it would be within the knowledge of a person skilled in the pertinent art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.

[0022] In general, terminology may be understood at least in part from usage in context.

For example, the term “one or more” as used herein, depending at least in part upon context, may be used to describe any feature, structure, or characteristic in a singular sense or may be used to describe combinations of features, structures or characteristics in a plural sense. Similarly, terms, such as “a,” “an,” or “the,” again, may be understood to convey a singular usage or to convey a plural usage, depending at least in part upon context. In addition, the term “based on” may be understood as not necessarily intended to convey an exclusive set of factors and may, instead, allow for existence of additional factors not necessarily expressly described, again, depending at least in part on context.

[0023] Various aspects of wireless communication systems will now be described with reference to various apparatus and methods. These apparatus and methods will be described in the following detailed description and illustrated in the accompanying drawings by various blocks, modules, units, components, circuits, steps, operations, processes, algorithms, etc. (collectively referred to as “elements”). These elements may be implemented using electronic hardware, firmware, computer software, or any combination thereof. Whether such elements are implemented as hardware, firmware, or software depends upon the particular application and design constraints imposed on the overall system.

[0024] The techniques described herein may be used for various wireless communication networks, such as code division multiple access (CDMA) system, time division multiple access (TDMA) system, frequency division multiple access (FDMA) system, orthogonal frequency division multiple access (OFDMA) system, single-carrier frequency division multiple access (SC- FDMA) system, and other networks. The terms “network” and “system” are often used interchangeably. A CDMA network may implement a radio access technology (RAT), such as Universal Terrestrial Radio Access (UTRA), evolved UTRA (E-UTRA), CDMA 2000, etc. A TDMA network may implement a RAT, such as GSM. An OFDMA network may implement a RAT, such as LTE or NR. The techniques described herein may be used for the wireless networks and RATs mentioned above, as well as other wireless networks and RATs.

[0025] Orthogonal frequency division multiplexing (OFDM) is used, for example, in

OFDMA communication systems including 5G NR, to provide efficient modulation for wireless communications. In an OFDM transmitter, groups of bits to be transmitted are transformed into complex symbols and converted into a time-domain waveform using, for example, an inverse fast Fourier transform (IFFT). The resulting digital waveform can be converted to analog form, amplified, and transmitted over-the-air to a receiver.

[0026] FIG. 1A illustrates a constant level power tracker. In this approach, a digital front- end circuit (DFEC) 110 can include a crest factor reduction (CFR) circuit 120. CFR circuit 120 may be configured to reduce peak-to-average -power-ratio (PAPR) of a signal to be transmitted. A reduced PAPR may result in higher efficiency operation of the power amplifier. [0027] A pre-DPD gain (PreDPDGain) amplifier 130 can provide amplification of the signal before it is provided to the digital pre-distorter (DPD) 140. Predistortion is a category of techniques that can be used to improve the linearity of radio transmitter amplifiers, such as a power amplifier. If the amplifier is not linear, the result can be an inaccurate representation of the input signal at the output. In order to account for such non-linearity, a pre-distorter may compensate for the non-linearity such that the input to the pre-distorter is accurately represented by the output of the power amplifier. Distortion in power amplifiers may have a number of factors including, but not limited to, the amount of power being used by the amplifier, with higher power levels typically resulting in greater distortion.

[0028] Meanwhile, the digitally pre-distorted version of the signal can be provided to a pre- digital-to-analog-con vers ion gain (PreDACGain) amplifier 150 to amplify the signal. A real and imaginary (IQ) digital- to- analog converter (DAC) 160 can convert the signal to analog and provide the analog version of the signal to the power amplifier (PA) 170. IQ DAC 160 can be included in a radio frequency (RF) - transmission (TX) chip 180.

[0029] The bias voltage Vcc for power amplifier 170 can be supplied by switched mode power supply SMPS 192. The Vcc level is controlled by Vcc level control 190 via RF front-end control interface (RFFE) commands (not shown). The Vcc level can be maintained constant within the symbol. It can be changed from symbol to symbol to track the power level. This approach is called average power tracking (APT). If Vcc is further lowered to improve the efficiency of power amplifier 170, and DPD 140 is used to compensate the non-linearity of power amplifier 170, this approach can be referred to as enhanced power tracking (EPT). The output of the power amplifier can ultimately be one or more antenna 199.

[0030] The approach of FIG. 1A does not rely on envelope tracking (ET). Envelope tracking is a power tracking technology to increase power amplifier efficiency. A signal to be amplified by the power amplifier may be a complex waveform with a significant amount of bandwidth and variability. Suitable envelope tracking can permit the power amplifier to operate efficiently and suitably.

[0031] Envelope trackers can be designed to follow the signal envelope instantly and provide enough current for the envelope tracked power amplifier. Typically, the bandwidth of the envelope is 3 times that of the signal. For fifth-generation (5G) wireless communication, to support a signal with bandwidth up to 100MHz, the envelope tracker typically tracks up to 150MHz as a single-sided signal. This bandwidth leads to various considerations in envelope tracker design. Those considerations may include trading efficiency for speed.

[0032] FIG. IB illustrates a fast or real-time envelope tracker. This can be referred to herein interchangeably as “fast” or “real-time,” because the envelope signal, sometimes simply referred to as the envelope, can be the absolute value of the original signal and consequently can precisely and instantaneously follow the original signal. This may contrast with a “slow” or “filtered” envelope signal (these terms may also be used interchangeably with one another herein), which may not change precisely and instantaneously with the original signal, even though it is based on, and forms an envelope of, the original signal. These may contrast with a multi-level envelope which, though not necessarily filtered, may still only track the original signal periodically. As mentioned below, filtering can be applied to a multi-level envelope as well, which can yield a slow or filtered envelope signal.

[0033] As shown in FIG. IB, DFEC 110 can include CFR circuit 120, as in FIG. 1A.

PreDPDGain amplifier 130 can provide amplification of the signal before it is provided to DPD 140. An ET path element 194 can read the signal either before or after digital pre-distortion, or optionally both. ET path element 194 may provide a fast or real-time tracked version of the signal to an envelope DAC (ENV DAC) 165. The analog output of ENV DAC 165 can be provided to a continuous envelope tracker 196. In turn, continuous envelope tracker 196 can provide a higher amperage version of the analog version of the fast-tracked or real-time envelope track to power amplifier 170.

[0034] Meanwhile, as also shown in FIG. IB, the digitally pre-distorted version of the signal can be provided to a PreDACGain amplifier 150 to amplify the signal. An IQ DAC 160 can convert the signal to analog and provide the analog version of the signal to the power amplifier 170. Both IQ DAC 160 and ENV DAC 165 can be included in an RF- TX chip 180. The output of the power amplifier can ultimately be one or more antenna 199.

[0035] FIG. 1C illustrates a multi-level envelope tracker. As shown in FIG. 1C, DFEC 110 can include CFR circuit 120 providing a crest factor reduced signal to PreDPDGain amplifier 130. The output of PreDPDGain amplifier 130 can be provided to a multi-level generator 197 as well as DPD 140, which may be a two-dimensional (2D) DPD. Multi-level generator 197 can provide a signal to a multi-level envelope tracker 193 as well as a filtered envelope generator 198. Filtered envelope generator 198 can provide a signal to DPD 140. Otherwise, multi-level envelope tracker 197 can function similarly to the fast or real-time envelope tracker described above with reference to FIG. IB.

[0036] Certain embodiments of the present disclosure, by contrast, track the signal envelope slowly and compensate for the side effect with more complicated digital pre-distortion. In certain embodiments, a relatively slow envelope tracker, such as a 4G envelope tracker, can provide an ET solution for a faster signal, such as 5G 100MHz.

[0037] FIG. 2 illustrates a system according to certain embodiments of the present disclosure. As shown in FIG. 2, a signal, x(t), to be amplified by a power amplifier 170, can undergo processing in RF chip 704 before coming to power amplifier 170. RF chip 704 can include DFEC 110 and RF-TRX 180, which may be implemented on the same chip as one another or on different chips from one another. Thus, for example, while RF chip 704 is shown as a single chip, RF chip 704 may be composed of multiple chips. A filtered ET generator 198 can process the signal and output a slowly tracked signal, Vcc(t), which can also be referred to as a filtered, tracked signal. By slowly tracking, it can be understood that the rate of change of the envelope, Vcc(t), may not match that of the original signal, x(t).

[0038] The original signal, x(t), and the filtered, tracked signal, Vcc(t), can be provided to

DPD 140, to provide a digitally pre-distorted signal to IQ DAC 160. IQ DAC 160 can provide an analog signal to power amplifier 170.

[0039] Meanwhile, the filtered, tracked signal, Vcc(t), can be provided to an ENV DAC

165. ENV DAC 165 can provide an analog version of the filtered, tracked signal to ET tracker 210. ET tracker 210 can generate a higher current version of the filtered, tracked signal and provide it to power amplifier 170. Power amplifier 170 can generate an amplified version of the digitized and pre-distorted signal to further RF circuitry, ultimately terminating at one or more antenna. [0040] Filtered ET generator 198 illustrated in FIG. 2 may be constructed in a variety of different ways. For example, a fast or real-time envelope tracking signal can be generated and then low-pass filtered to generate the filtered, tracked signal. The fast or real-time envelope tracking signal may be an absolute value of the input signal. As another option, the filtered, tracked signal can be generated by modeling a multi-level envelope tracking signal and then low-pass filtering. The multi-level envelope tracking signal can generate a discrete staircase signal, but the law pass filtering may smooth the transitions and reduce switching noise.

[0041] The filtered envelope tracking signal Vcc(t) can be provided to ENV DAC 165 to drive ET tracker 210, as mentioned above. The analog signal from ENV DAC 165 may be relatively low amperage, but the signal to power amplifier 170 may need to be up to 1 amp - ET tracker 210 can take the weak signal and amplify the signal for sending to power amplifier 170 - the amplified signal may have the same voltage but much higher current, and may be a separate chip. Because ET tracker 210 only needs to follow a signal with a slow slew rate, more accurate tracking can be achieved. Here the slew rate may be slow relative to the slew rate of x(t). Thus, for example, the slew rate may depend on the low-pass filtering that is used in the filtered ET generator 198, the more of the signal that is filtered out, the lower the slew rate may become. [0042] As mentioned above, the filtered envelope tracking signal Vcc(t) can also be provided to DPD 140. DPD 140 can compensate the input signal as a function of both the input signal, x(t), and the envelope tracking signal, Vcc(t). Thus, the output of DPD 140 may not be based just on Vcc(t) and characteristics of power amplifier 170, but may also take into account envelope information.

[0043] DPD 140 can be variously implemented. In one example, DPD 140 may include multiple DPD lookup tables (LUTs) corresponding to multiple trajectories of Vcc. The DPD 140 may pick the closest value or interpolate between adjacent values. The values of Vcc in the lookup tables can be various constant voltages (such as IV, 2V, 3V, or the like).

[0044] In certain embodiments, DPD 140 may receive the discrete staircase signal, and the low-pass filtering may be done to provide the signal to ENV DAC 165. This approach may permit a simpler design of the logic for DPD 140.

[0045] One effect of low-pass filtering Vcc is that the bandwidth of the resulting signal is reduced. This, in turn, relaxes the requirements of envelope tracker 210.

[0046] Certain embodiments may impose a further limitation on Vcc to prevent Vcc from going below a minimum level. For example, a minimum level of Vcc may be set to 1 V, such that even if the low-pass filtered output would otherwise be below 1 V, it may be maintained at 1 V. As another option, the low-pass filtered output may be uniformly shifted by 1 V, such that instead of ranging from 0 to X volts, the output may range from 1 to X+l volts.

[0047] FIG. 3A illustrates a first option for a filtered ET generator, according to certain embodiments. As shown in FIG. 3 A, an absolute value circuit 310 may provide an absolute value of the signal x(t), while low-pass filter 320 may provide a filtered envelope tracking signal, Vcc(t). The filtered envelope tracking signal, Vcc(t) may be provided to DPD 140.

[0048] FIG. 3B illustrates a first option for a filtered ET generator, according to certain embodiments. As shown in FIG. 3A, a multi-level generator 197 may provide a stepped signal based on x(t), while low-pass filter 320 may provide a filtered envelope tracking signal, Vcc(t). The stepped signal may be provided to DPD 140. The filtered envelope tracking signal, Vcc(t) may also be provided to DPD 140.

[0049] FIG. 4 illustrates a comparison of various tracking approaches. As shown in FIG.

4, a fast or real-time tracked signal 410 may correspond to the absolute value of the input signal. The horizontal axis may represent time, and the vertical axis may representative voltage, with voltage zero and an arbitrary starting time as the bottom left corner of the graph in FIG. 4. A multi level tracked signal 420 may periodically round up the value to the next half volt level. A filtered tracked signal 430 may, as illustrated in this example, be a low-pass filtered version of the multi level tracked signal 420. As mentioned above, there are other ways that filtered tracked signal 430 may be generated. From this graph it may be concluded that although a filtered, tracked signal 430 may not precisely align to the absolute value of the original signal, the difference may be relatively small, for example, less than half a volt.

[0050] FIG. 5 illustrates a method for envelope tracking, according to certain embodiments. The method of FIG. 5 may be implemented by, for example, the circuit shown in FIG. 2. As shown in FIG. 5, a method can include, at 510, receiving an input signal at a digital pre-distorter, wherein the input signal is representative of a signal to be transmitted. This may be the signal x(t) in FIG. 2.

[0051] As shown in FIG. 5, the method can also include, at 520, receiving the input signal at a filtered envelope tracking generator. This may also be the same signal x(t).

[0052] The method can further include, at 530, generating, by the filtered envelope tracking generator, one or more output signals. The one or more output signals can include a filtered, tracked envelope of the input signal. For example, Vcc(t) in FIG. 2 is an example of a filtered, tracked envelope of the input signal. The filtered, tracked envelope may be a low-pass filtered form of the absolute value of the input signal or a low-pass filtered form of a multi-level staircase representation of the input signal.

[0053] As shown in FIG. 5, the method can additionally include, at 540, receiving at least one of the one or more output signals at the digital pre-distorter. For example, Vcc(t) or an intermediate signal produced in the process of producing Vcc(t) can be provided to the digital pre distorter. [0054] The method can also include, at 550, receiving at an envelope tracker at least one of the one or more output signals. The ET can be designed to provide a high current (for example, up to 1 amp) version of the filtered, tracked envelope.

[0055] Thus, the method can further include, at 560, providing an envelope tracking input to a power amplifier from the envelope tracker based on the at least one of the one or more output signals received at the envelope tracker. The envelope tracking input can be the current amplified version of Vcc(t).

[0056] As described above, the filtered envelope tracking generator can generate the one or more output signals using a fast or real-time envelope tracking generator (such as illustrated in FIG. IB) and a low-pass filter. As also described above, as another alternative, the filtered envelope tracking generator can generate the one or more output signals using a multi-level envelope tracking generator (such as illustrated in FIG. 1C) and a low-pass filter.

[0057] A first output signal of the one or more output signals can be provided from the multi-level envelope tracking generator, and a second output signal of the one or more output signals can be provided from the low-pass filter. The first output signal can be provided to the digital pre-distorter, while the second output signal can be provided to the envelope tracker. In other words, the DPD may receive an intermediate stage of the ET generator, whereas the ET may receive the low-pass filtered version.

[0058] The method can also include, at 570, the DPD selecting a lookup table. The lookup table may be selected as corresponding to a current level of the multi-level envelope tracking generator, if one is used. As another option, the DPD can select a lookup table based on the at least one of the one or more output signals provided to the digital pre-distorter. The LUT can be used in combination with information about the electrical characteristics of the power amplifier to identify the correct amount of pre-distortion to apply to the signal.

[0059] The method can further include, at 580, maintaining or boosting the voltage level of the ET signal. For example, a voltage regulation circuit or other mechanism can be used to maintain the voltage of the ET signal to be at or above a predetermined minimum level of voltage. As another alternative, a boost circuit or other mechanism may be used to uniformly increase the voltage of the output signal of the ET generator such that it never falls below some minimum level. [0060] The method can additionally include, at 590, compensating, by the digital pre distorter, the input signal based on characteristics of the power amplifier and the one of the one or more output signals from the envelope tracking generator. In some cases, the DPD and the ET receive the same signal, and the ET signal generator only outputs a single signal. In other cases, as mentioned above, the ET signal generator may provide an intermediate signal (such as the output of the multi-level envelope tracking generator) and the final signal after low-pass filtering. Other embodiments are also possible.

[0061] FIG. 6 illustrates a node according to certain embodiments. As shown in FIG. 6, a node 600 may include a processor 602, a memory 604, a transceiver 606. These components are shown as connected to one another by bus 608, but other connection types are also permitted. When node 600 is user equipment 802 (see FIG. 8, described below), additional components may also be included, such as a user interface (UI), sensors, and the like. Similarly, node 600 may be implemented as a blade in a server system when node 600 is configured as core network element 806 (see FIG. 8, described below). Other implementations are also possible.

[0062] Transceiver 606 may include any suitable device for sending and/or receiving data.

Transceiver 606 may include the circuitry shown in FIG. 2 and may implement the method of FIG. 6. Node 600 may include one or more transceivers, although only one transceiver 606 is shown for simplicity of illustration. An antenna 610 is shown as a possible communication mechanism for node 600. Multiple antennas and/or arrays of antennas may be utilized. Additionally, examples of node 600 may communicate using wired techniques rather than (or in addition to) wireless techniques. For example, access node 804 may communicate wirelessly to user equipment 802 and may communicate by a wired connection (for example, by optical or coaxial cable) to core network element 806. Other communication hardware, such as a network interface card (NIC), may be included as well.

[0063] As shown in FIG. 6, node 600 may include processor 602. Although only one processor is shown, it is understood that multiple processors can be included. Processor 602 may include microprocessors, microcontrollers, digital signal processors (DSPs), application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), programmable logic devices (PFDs), state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functions described throughout the present disclosure. Processor 602 may be a hardware device having one or many processing cores. Processor 602 may execute software. Software shall be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subprograms, software modules, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, functions, etc., whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. Software can include computer instructions written in an interpreted language, a compiled language, or machine code. Other techniques for instructing hardware are also permitted under the broad category of software. Processor 602 may be a baseband chip, such as baseband chip 702 in FIG. 7. Node 600 may also include other processors, not shown, such as a central processing unit of the device, a graphics processor, or the like. Processor 602 may include internal memory (also known as local memory, not shown in FIG. 6) that may serve as memory for L2 data. Processor 602 may include a radio frequency chip, for example, integrated into a baseband chip, or a radio frequency chip may be provided separately. Processor 602 may be configured to operate as a modem of node 600, or may be one element or component of a modem. Other arrangements and configurations are also permitted.

[0064] As shown in FIG. 6, node 600 may also include memory 604. Although only one memory is shown, it is understood that multiple memories can be included. Memory 604 can broadly include both memory and storage. For example, memory 604 may include random-access memory (RAM), read-only memory (ROM), SRAM, dynamic RAM (DRAM), ferro-electric RAM (FRAM), electrically erasable programmable ROM (EEPROM), CD-ROM or other optical disk storage, hard disk drive (HDD), such as magnetic disk storage or other magnetic storage devices, Flash drive, solid-state drive (SSD), or any other medium that can be used to carry or store desired program code in the form of instructions that can be accessed and executed by processor 602. Broadly, memory 604 may be embodied by any computer-readable medium, such as a non- transitory computer-readable medium. The memory 604 can be the external memory 708 in FIG. 7. The memory 604 may be shared by processor 602 and other components of node 600, such as the unillustrated graphic processor or central processing unit.

[0065] FIG. 7 illustrates a block diagram of an apparatus 700 including a baseband chip

702, a radio frequency chip 704, and a host chip 706, according to some embodiments of the present disclosure. Apparatus 700 may be an example of any suitable node of wireless network 800 in FIG. 8, such as user equipment 802 or access node 804.

[0066] As shown in FIG. 7, apparatus 700 may include baseband chip 702, RF chip 704, host chip 706, and one or more antennas 710. In some embodiments, baseband chip 702 is implemented by processor 602 and memory 604, and RF chip 704 is implemented by processor 602, memory 604, and transceiver 606, as described above with respect to FIG. 6. Besides the on- chip memory (also known as “internal memory” or “local memory,” e.g., registers, buffers, or caches) on each chip 702, 704, or 706, apparatus 700 may further include an external memory 708 (e.g., the system memory or main memory) that can be shared by each chip 702, 704, or 706 through the system/main bus. Although baseband chip 702 is illustrated as a standalone SoC in FIG. 7, it is understood that in one example, baseband chip 702 and RF chip 704 may be integrated as one SoC; in another example, baseband chip 702 and host chip 706 may be integrated as one SoC; in still another example, baseband chip 702, radio frequency chip 704, and host chip 706 may be integrated as one SoC, as described above. Thus, for example, the circuitry illustrated in FIG. 2 may be implemented on both a radio frequency chip 704 andbaseband chip 702, or on a single chip. Other implementations are also possible.

[0067] For transmission, also sometimes referred to as uplink, host chip 706 may generate raw data and send it to baseband chip 702 for encoding, modulation, and mapping. Baseband chip 702 may also access the raw data generated by host chip 706 and stored in external memory 708, for example, using the direct memory access (DMA). Baseband chip 702 may first encode (e.g., by source coding and/or channel coding) the raw data and modulate the coded data using any suitable modulation techniques, such as multi-phase pre-shared key (MPSK) modulation or quadrature amplitude modulation (QAM). Baseband chip 702 may perform any other functions, such as symbol or layer mapping, to convert the raw data into a signal that can be used to modulate the carrier frequency for transmission. In the uplink, baseband chip 702 may send the modulated signal to radio frequency chip 704. RF chip 704, through the transmitter (Tx), may convert the modulated signal in the digital form into analog signals, i.e., radio frequency signals, and perform any suitable front-end radio frequency functions, such as filtering, up-conversion, or sample-rate conversion. As mentioned above, RF chip 704 may include such elements as an RF-TX, DFEC, and PA, as well as an ET tracker. Thus, RF chp 704 may implement the circuit shown in FIG. 2 and may perform the method illustrated in FIG. 5, as well as implementing other circuits and other methods. Antenna 710 (e.g., an antenna array) may transmit the radio frequency signals provided by the transmitter of RF chip 704.

[0068] In the downlink, antenna 710 may receive radio frequency signals and pass the radio frequency signals to the receiver (Rx) of RF chip 704. RF chip 704 may perform any suitable front-end radio frequency functions, such as filtering, down-conversion, or sample-rate conversion, and convert the radio frequency signals into low-frequency digital signals (baseband signals) that can be processed by baseband chip 702. In the downlink, baseband chip 702 may demodulate and decode the baseband signals to extract raw data that can be processed by host chip 706. Baseband chip 702 may perform additional functions, such as error checking, de-mapping, channel estimation, descrambling, etc. The raw data provided by baseband chip 702 may be sent to host chip 706 directly or stored in external memory 708.

[0069] FIG. 8 illustrates a wireless network according to certain embodiments. As shown in FIG. 8, wireless network 800 may include a network of nodes, such as a UE 802, an access node 804, and a core network element 806. User equipment 802 may be any terminal device, such as a mobile phone, a desktop computer, a laptop computer, a tablet, a vehicle computer, a gaming console, a printer, a positioning device, a wearable electronic device, a smart sensor, or any other device capable of receiving, processing, and transmitting information, such as any member of a vehicle to everything (V2X) network, a cluster network, a smart grid node, or an Internet-of-Things (IoT) node. It is understood that user equipment 802 is illustrated as a mobile phone simply by way of illustration and not by way of limitation.

[0070] Access node 804 may be a device that communicates with user equipment 802, such as a wireless access point, a base station (BS), a Node B, an enhanced Node B (eNodeB or eNB), a next-generation NodeB (gNodeB or gNB), a cluster master node, or the like. Access node 804 may have a wired connection to user equipment 802, a wireless connection to user equipment 802, or any combination thereof. Access node 804 may be connected to user equipment 802 by multiple connections, and user equipment 802 may be connected to other access nodes in addition to access node 804. Access node 804 may also be connected to other UEs. It is understood that access node 804 is illustrated by a radio tower by way of illustration and not by way of limitation.

[0071] Core network element 806 may serve access node 804 and user equipment 802 to provide core network services. Examples of core network element 806 may include a home subscriber server (HSS), a mobility management entity (MME), a serving gateway (SGW), or a packet data network gateway (PGW). These are examples of core network elements of an evolved packet core (EPC) system, which is a core network for the LTE system. Other core network elements may be used in LTE and in other communication systems. In some embodiments, core network element 806 includes an access and mobility management function (AMF) device, a session management function (SMF) device, or a user plane function (UPF) device, of a core network for the NR system. It is understood that core network element 806 is shown as a set of rack-mounted servers by way of illustration and not by way of limitation.

[0072] Core network element 806 may connect with a large network, such as the Internet

808, or another IP network, to communicate packet data over any distance. In this way, data from user equipment 802 may be communicated to other UEs connected to other access points, including, for example, a computer 810 connected to Internet 808, for example, using a wired connection or a wireless connection, or to a tablet 812 wirelessly connected to Internet 808 via a router 814. Thus, computer 810 and tablet 812 provide additional examples of possible UEs, and router 814 provides an example of another possible access node.

[0073] A generic example of a rack-mounted server is provided as an illustration of core network element 806. However, there may be multiple elements in the core network including database servers, such as a database 816, and security and authentication servers, such as an authentication server 818. Database 816 may, for example, manage data related to user subscription to network services. A home location register (HLR) is an example of a standardized database of subscriber information for a cellular network. Likewise, authentication server 818 may handle authentication of users, sessions, and so on. In the NR system, an authentication server function (AUSF) device may be the specific entity to perform user equipment authentication. In some embodiments, a single server rack may handle multiple such functions, such that the connections between core network element 806, authentication server 818, and database 816, may be local connections within a single rack.

[0074] Although the above-description used uplink processing of a signal in a UE as examples in various discussions, similar techniques may likewise be used for the other direction of processing and for processing in other devices, such as access nodes, and core network nodes. For example, any device that transmits signals with a power amplifier may benefit some embodiments of the present disclosure, even if not specifically listed above or illustrated in the example network of FIG. 8.

[0075] Each of the elements of FIG. 8 may be considered a node of wireless network 800.

More detail regarding the possible implementation of a node is provided by way of example in the description of a node 600 in FIG. 6 above. Node 600 may be configured as user equipment 802, access node 804, or core network element 806 in FIG. 8. Similarly, node 600 may also be configured as computer 810, router 814, tablet 812, database 816, or authentication server 818 in FIG. 8.

[0076] In various aspects of the present disclosure, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or encoded as instructions or code on a non-transitory computer-readable medium. Computer-readable media includes computer storage media. Storage media may be any available media that can be accessed by a computing device, such as node 600 in FIG. 6. By way of example, and not limitation, such computer-readable media can include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, HDD, such as magnetic disk storage or other magnetic storage devices, Flash drive, SSD, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a processing system, such as a mobile device or a computer. Disk and disc, as used herein, includes CD, laser disc, optical disc, DVD, and floppy disk where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0077] According to one aspect of the present disclosure, a circuit for envelope tracking can include a digital pre-distorter configured to receive an input signal representative of a signal to be transmitted. The circuit can also include a filtered envelope tracking generator configured to receive the input signal and to provide one or more output signals. The one or more output signals can include a signal that is a filtered, tracked envelope of the input signal. One of the one more output signals can be provided to the digital pre-distorter. The circuit can further include an envelope tracker configured to receive the filtered, tracked envelope and to provide an envelope tracking input to a power amplifier.

[0078] In some embodiments, the filtered envelope tracking generator can include a real time envelope tracking generator and a low-pass filter.

[0079] In some embodiments, the filtered envelope tracking generator can include a multi level envelope tracking generator and a low-pass filter.

[0080] In some embodiments a first output signal of the one or more output signals can be provided from the multi-level envelope tracking generator. A second output signal of the one or more output signals can be provided from the low-pass filter. The first output signal can be provided to the digital pre-distorter and the second output signal can be provided to the envelope tracker.

[0081] In some embodiments, the digital pre-distorter can be configured to select a lookup table corresponding to a current level of the multi-level envelope tracking generator.

[0082] In some embodiments, the digital pre-distorter can be configured to select a lookup table based on the one of the one or more output signals provided to the digital pre-distorter. [0083] In some embodiments, the filtered envelope tracking generator can include a voltage regulation circuit configured to maintain one of the one or more output signals at or above a predetermined voltage. [0084] In some embodiments, the filtered envelope tracking generator can include a boost circuit configured to increase a voltage of one of the one or more output signals by a predetermined voltage.

[0085] In some embodiments, the digital pre-distorter can be configured to compensate the input signal based on characteristics of the power amplifier and the one of the one or more output signals from the filtered envelope tracking generator.

[0086] According to another aspect of certain embodiments of the present disclosure, a method of envelope tracking can include receiving an input signal at a digital pre-distorte. The the input signal can be representative of a signal to be transmitted. The method can also include receiving the input signal at a filtered envelope tracking generator. The method can further include generating, by the filtered envelope tracking generator, one or more output signals. The one or more output signals can include a filtered, tracked envelope of the input signal. The method can additionally include receiving at least one of the one or more output signals at the digital pre distorter. The method can also include receiving at an envelope tracker at least one of the one or more output signals. The method can further include providing an envelope tracking input to a power amplifier from the envelope tracker based on the at least one of the one or more output signals received at the envelope tracker.

[0087] In some embodiments, the filtered envelope tracking generator can generate the one or more output signals using a real-time envelope tracking generator and a low-pass filter.

[0088] In some embodments, the filtered envelope tracking generator can generate the one or more output signals using a multi-level envelope tracking generator and a low-pass filter. [0089] In some embodiments, a first output signal of the one or more output signals can be provided from the multi-level envelope tracking generator and a second output signal of the one or more output signals can be provided from the low-pass filter. The first output signal can be provided to the digital pre-distorter and the second output signal can be provided to the envelope tracker.

[0090] In some embodiments, the method can also include selecting, by the digital pre distorter, a lookup table corresponding to a current level of the multi-level envelope tracking generator.

[0091] In some embodiments, the method can further include selecting, by the digital pre distorter, a lookup table based on the at least one of the one or more output signals provided to the digital pre-distorter. [0092] In some embodiments, the method can additionally include maintaining, by a voltage regulation circuit, one of the one or more output signals at or above a predetermined voltage. [0093] In some embodiments, the method can also include boosting, by a boost circuit, a voltage of one of the one or more output signals by a predetermined voltage.

[0094] In some embodiments, the method can further include compensating, by the digital pre-distorter, the input signal based on characteristics of the power amplifier and the one of the one or more output signals from the envelope tracking generator.

[0095] According to a further aspect of certain embodiments, a radio frequency chip can include a digital front-end that includes a digital pre-distorter configured to receive an input signal representative of a signal to be transmitted, wherein the digital front end further comprises a filtered envelope tracking generator configured to receive the input signal and to provide one or more output signals. The one or more output signals can include a signal that is a filtered, tracked envelope of the input signal. One of the one more output signals can be provided to the digital pre distorter. The radio frequency chip can also include an envelope tracker configured to receive the filtered, tracked envelope and to provide an envelope tracking input to a power amplifier. The radio frequency chip can further include the power amplifier. The power amplifier can be configured to receive an output of the digital pre-distorter and the filtered, tracked envelope.

[0096] In some embodiments, the radio frequency chip can further include an imaginary and real digital to analog converter configured to convert the output of the digital pre-distorter to analog form and to provide the analog form of the output of the digital pre-distorter to the power amplifier. The radio frequency chip can also include an envelope tracking digital to analog converter configured to convert the filtered, tracked envelope to analog form and to provide the analog form of the filtered, tracked envelope to an envelope tracking tracker.

[0097] The foregoing description of the specific embodiments will so reveal the general nature of the present disclosure that others can, by applying knowledge within the skill of the art, readily modify and/or adapt for various applications such specific embodiments, without undue experimentation, without departing from the general concept of the present disclosure. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented herein. It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of the teachings and guidance. [0098] Embodiments of the present disclosure have been described above with the aid of functional building blocks illustrating the implementation of specified functions and relationships thereof. The boundaries of these functional building blocks have been arbitrarily defined herein for the convenience of the description. Alternate boundaries can be defined so long as the specified functions and relationships thereof are appropriately performed.

[0099] The Summary and Abstract sections may set forth one or more but not all exemplary embodiments of the present disclosure as contemplated by the inventor(s), and thus, are not intended to limit the present disclosure and the appended claims in any way.

[0100] Various functional blocks, modules, and steps are disclosed above. The particular arrangements provided are illustrative and without limitation. Accordingly, the functional blocks, modules, and steps may be re-ordered or combined in different ways than in the examples provided above. Likewise, certain embodiments include only a subset of the functional blocks, modules, and steps, and any such subset is permitted.

[0101] The breadth and scope of the present disclosure should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.