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Patent Searching and Data


Title:
FPGA PLATFORM, PERFORMANCE EVALUATION AND DESIGN OPTIMIZATION METHOD THEREFOR, AND STORAGE MEDIUM
Document Type and Number:
WIPO Patent Application WO/2021/115039
Kind Code:
A1
Abstract:
An FPGA platform, a performance evaluation and design optimization method therefor, and a storage medium. The method comprises: classifying data to be processed of an algorithm to be operated of the FPGA platform according to variables, the data corresponding to each variable being classified into a same data class, and the number of the data classes being equal to the number of the variables and not less than 2 (S101); calculating a calculation amount and a read amount required by each data class (S102); summing the calculation amounts and the read amounts of the data classes to obtain a total calculation amount and a total read amount of the algorithm to be operated (S103); and performing performance evaluation and/or design optimization on the FPGA platform on the basis of the total calculation amount and the total read amount (S104). The data to be processed is classified according to the variables on the basis of the algorithm to be operated, so as to visually reflect the contribution of the data to be processed in the data classes to the calculation amount and the read amount of the algorithm to be operated, so that the FPGA platform is analyzed on the basis of the total calculation amount and the total read amount to find performance bottlenecks of the FPGA platform.

Inventors:
SHAO CUIPING (CN)
LI HUIYUN (CN)
LI QINGFENG (CN)
Application Number:
PCT/CN2020/129156
Publication Date:
June 17, 2021
Filing Date:
November 16, 2020
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Assignee:
SHENZHEN INST ADV TECH (CN)
International Classes:
G06F11/34
Foreign References:
CN111176962A2020-05-19
CN109002601A2018-12-14
CN107341101A2017-11-10
US7624209B12009-11-24
Attorney, Agent or Firm:
BEIJING ZHONG XUN TONG DA INTELLECTUAL PROPERTY AGENCY CO., LTD. (CN)
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