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Title:
GATE-SOURCE VOLTAGE DISTURBANCE REJECTION CIRCUIT BASED ON TRANSCONDUCTANCE GAIN NEGATIVE FEEDBACK MECHANISM
Document Type and Number:
WIPO Patent Application WO/2022/077758
Kind Code:
A1
Abstract:
A gate-source voltage disturbance rejection circuit based on a transconductance gain negative feedback mechanism, used for driving a driven power MOSFET (Q1). The driven power MOSFET (Q1) performs a switching operation by means of a driving chip; the circuit comprises a driving transistor (Q2); by means of a transconductance gain of the driving transistor (Q2) and an parasitic resistance of the driven power MOSFET (Q1), a displacement current is generated to charge and discharge a parasitic input capacitance of the driven power MOSFET (Q1); a negative feedback mechanism is constructed on the basis of the transconductance gain, such that under external disturbance, a gate-source voltage is controlled to remain stable, and positive and negative voltage divergent oscillations of the gate-source voltage are suppressed.

Inventors:
SHAO TIANCONG (CN)
LI ZHIJUN (CN)
ZHENG TRILLION Q (CN)
HUANG BO (CN)
WANG JUNXING (CN)
Application Number:
PCT/CN2020/137514
Publication Date:
April 21, 2022
Filing Date:
December 18, 2020
Export Citation:
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Assignee:
UNIV BEIJING JIAOTONG (CN)
GLOBAL POWER TECH CO LTD (CN)
International Classes:
H02M1/32; H03F1/34
Foreign References:
CN108270424A2018-07-10
CN106026721A2016-10-12
CN106100296A2016-11-09
CN102231598A2011-11-02
CN108233684A2018-06-29
JP2017175678A2017-09-28
Attorney, Agent or Firm:
FU ZHOU GULOU JING HUA PATENT AGENCY (GP.) (CN)
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