The use of a ‘normally on’ transistor, namely where the transistor functions in an ON state in the absence of a signal applied to the base is desirous for the formation of digital logic circuits as they allow for the construction of logic gates without need for complementary transistors, halving the transistor count.

It is known that a PNP bipolar junction transistor (BJT) can be operated as a normally on transistor through a circuit configuration in which the base of the BJT is connected to ground through a resistor. When a voltage is applied across the emitter and base terminals of the BJT, the emitter being more positive, a current can flow out of the base terminal and through the resistor. This allows for current flow between the emitter and collector terminals of the transistor, in other words the transistor is ON. To turn OFF the transistor the base of the transistor is connected to a current source able to provide sufficient current through the resistor that the current through the transistor drops sufficiently (or stops) such that current flow between the emitter and collector ceases.

The temperature coefficient of resistors are typically large. This makes it difficult to provide the aforementioned circuit with operational stability over a wide range of temperatures. Further, the resistance value (ohms) of the resistor must be large to be sufficiently current limiting that the transistor can be switched off with the maximum current available from the current source. Resistors with values that meet this requirement are physically large. For these reasons it is impracticable to use this circuit design in many integrated circuits (IC).

According to a first aspect of the invention there is provided a circuit comprising: a bipolar transistor, a base terminal of the bipolar transistor being switchably connectable to a signal source; a diode having a first terminal connected to the base terminal of the transistor, and a second terminal connected to a reference voltage; the circuit arranged such that when the signal source is not connected to the base terminal of the transistor, a voltage applied at an emitter terminal of the bipolar transistor causes a current flow through the base terminal of the transistor and through the diode such that the transistor is in an ON state; the impedance of the signal source being lower than the impedance of the transistor through the emitter and base terminals; and the diode being selected to provide a current limiting function such that when the signal source is connected to the base of the transistor, current flow through the base terminal reduces such that the transistor switches to an OFF state and means to control the switching speed of the transistor, comprising means to vary the reference voltage to vary the voltage across the diode.

According to another aspect of the invention there is provided a method of operating a circuit; the circuit comprising a bipolar transistor, a diode having a first terminal connected to the base terminal of the transistor; and a second terminal of the diode connected to a reference voltage; a voltage being applied across an emitter terminal of the transistor and the second terminal of the diode; the method comprising switchably connecting the base terminal of the transistor and the first terminal of the diode to a signal source having an impedance lower than the impendence across the emitter and base terminals of the bipolar transistor such that: when not connected so as to cause a current flow through the base terminal of the transistor and through the diode to turn the transistor ON; and when connected current flow through the control terminal of the transistor reduces to switch the transistor OFF; and altering the switching speed of the transistor by varying the reference voltage.

The following applies to either aspect of the invention.

The diode provides the current limiting function of a large resistor of the prior art circuit; however, the diode, unlike a resistor, is a relatively small electronic component and therefore makes the circuit more feasible for use in implementing digital logic circuits. The current limiting function of the diode provides a convenient means to restrict current flow through the base-emitter terminals of the transistor when ON to allow for a relatively small potential drop across the emitter base of the transistor. This leads to a small change in the voltage at the base (relative to reference voltage) when the transistor switched between OFF and ON. This reduces parasitic effects between bases of neighbouring transistors formed within a semiconductor device.

The diode may provide the current limiting function in one or more ways. The physical size of the diode may be selected to provide the required resistance; the smaller the diode the more limited its current carrying capacity. Alternatively or additionally the diode may be arranged in the circuit to be reversed biased when the voltage is applied across and emitter terminal of the transistor and the second terminal of the diode. This latter method is preferred, especially where larger diodes are to be used.

The diode circuit may be operated such that the diode is reversed biased with a voltage across the diode that is below its breakdown voltage. When reverse biased, current flow through the diode may be a result of a leakage current, e.g. due to quantum tunnelling.

The diode may be a zener diode. Zener diodes, when biased below their zener voltage (breakdown voltage), operate reliably compared with other diodes. Nevertheless, alternative diodes may be used such as, for example, a tunnel diode which may be operated in forward bias.

Favourably the modulus of the temperature coefficient of the diode is less or equal to 2mV per degree Celsius. More favourably the diode has a temperature coefficient of approximately OmV per degree Celsius as this provides the greatest degree of operational stability with changes in temperature. To provide this temperature coefficient it is preferred that the diode is a zener diode selected to exhibit a zener voltage between 4 and 7 Volts inclusive, favourably less than or equal to about 5.6V, and more favourably about 5.6V.

The circuit finds particular utility for implementing a logic gate, for example as an inverter logic gate, that outputs a voltage representing the opposite logic level to an input connected to the base of the transistor. Multiple of the aforementioned circuits as variously described above, may be connected together to implement logic gates that perform other logical operations.

An increased voltage across the diode leads to increased current through the diode, increasing the switching speed of the transistor between an OFF and ON state. Where implemented in logic circuitry, an increased switching speed reduces the resolve time of the logic circuitry and thus increases the speed at which the logic circuitry can be clocked.

Increasing the voltage across the diode leads to an increased emitter-collector current through the transistor. This allows for a higher current signal source to the base of a next stage transistor of the logic circuitry enabling that the next stage transistor to switch faster as well.

However an increased voltage across the diode leads to an increase in the power consumed by the circuit. Through provision of the means (e.g. a switching speed controller) to vary and thus control the voltage across the diode it is possible to provide increased switching speed whilst minimising the increase in power consumption.

Varying the reference voltage may be achieved by a connection between the second terminal of the diode to a dynamic voltage source and/or by provision of a switching means arranged to switchably connect the second terminal of the diode to one of the multiple different reference voltage sources, each different reference voltage source providing a different reference voltage. One or more of the different reference voltage sources may be dynamic voltage sources.

The means to control the switching speed of the transistor may be arranged to receive a clock signal and adapted to use the clock signal to vary the voltage across the diode over time.

Favourably the means to control the switching speed (switching speed controller) of the transistor is arranged to vary the voltage across the diode during a period of the clock cycle such that the voltage across the diode is relatively high when the transistor is likely to be switching, e.g. towards the beginning of a clock cycle, and relatively low when it is likely to be static, typically at the end of the clock cycle.

This may be achieved, for example, by the means to control the switching speed of the transistor being arranged to switch connection of the second terminal of the diode between a high reference voltage source and a low reference voltage source at a frequency that corresponds to an integer multiple of the clock speed. The bipolar junction transistor may be of PNP or NPN form. With PNP form the voltage across the emitter and second terminal of the diode is arranged such that conventional current flows from the emitter, through the transistor out of the base terminal and into the diode, and that the signal source is a current source. With the NPN form the voltage across the emitter and second terminal of the diode is arranged such that conventional current flows from the second terminal of the diode, through the diode, into the base terminal and out through the emitter, and that the signal source is a current sink.

The invention will now be described by way of example with reference to the following figures in which: Figure 1 is a schematic of a circuit comprising a PNP bipolar junction transistor and a reversed biased zener diode, which implements an inverter logic gate (NOT gate) the circuit including a switching means to vary the voltage seen at the anode of the diode; Figure 2 comprises representations of timing sequences illustrating how the voltage seen by the anode of the diode is varied with a clock signal; and

Figure 3 is a schematic of a variant circuit to Fig 1 in which the circuit includes a variable voltage source connected to the second terminal of the zener diode.

With reference to Figure 1 there is shown a circuit 10 comprising a PNP bipolar junction transistor 11. The emitter E of the transistor is connected to the high side rail and the collector of the transistor C connected to ground or some other low side voltage. The base B of the transistor 11 is switchably connectable through switch 12 to a current source 13.

A first terminal of a zener diode 14 is connected to both the base B of the transistor 11 and the current source 13 through switch 12. A second terminal of the diode 14 is connected selectively to one of two different low side reference voltages V _L ,V _H through switching circuitry 15.

V _L is a relatively low reference voltage and V _H a relatively high reference voltage compared with V _L - The two reference voltages may be provided by a number of voltage regulators. Both V _L and V _H are lower voltages than the high side reference voltage connected to the emitter.

The switching circuitry 15 receives a clock signal 16 from a clock 17. The switching circuitry 15 uses the clock signal to time the switching between the two reference voltages V _L ,V _H in a manner to be described later. The zener diode 14 is oriented such as to be reverse biased. The zener diode 14 is chosen to have a zener voltage of about 5.6V in order that it has a temperature coefficient as close as possible to OmV per degree Celsius. This ensures the zener diode’s 14 characteristics remain stable with any change in the diode’s 14 temperature, e.g. as a result of external conditions.

With switch 12 open, such that the current source 13 is isolated from the base terminal B, there is a voltage drop across the transistor 11 and diode 14, and hence conventional current flow through the emitter base terminals of the transistor 11 and through the reverse biased diode 14; current flow through the diode 14attributable to a leakage current.

The circuit 10 is arranged such that, irrespective of whether the diode 14 is connected to VL or VH, the voltage drop across the diode 14 is below the breakdown voltage of the diode 14. The leakage current is thus thought to be a consequence of a quantum tunnelling effect within the diode 14.

The diode 14 is selected such that, for the expected voltages across it, sufficient leakage current flows through it and therefore also between the emitter E and base B of the diode to allow for current flow between the emitter E and collector C of the transistor 11; i.e. the transistor is ON.

Additionally, it is preferable that the diode 14 is selected that, for the expected voltage across it, the leakage current flow is kept as low as possible whilst ensuring the transistor is ON. This has the advantage of reducing the voltage drop across the transistor when the transistor is ON and therefore reduces the change in potential of the base of the transistor (relatively to ground of some reference voltage) when the transistor is switched between OFF and ON. This minimises static fields between transistors formed in the same wafer. In one example it is preferred that the switching voltage across the transistor is limited to around 0.5V. When the switch 12 is closed the current source 13 is connected to the base terminal B of the transistor 11. The impedance of the current source 13 is selected to be lower than the impedance through the emitter base terminals of the transistor 11 causing the diode 14 to preferentially draw current from the current source 13rather than the base B of the transistor 11. This results in current through the emitter-base of the transistor 11 reducing, e.g. substantially to zero, such that current between the emitter and collector reduces, if not ceases, to an extent that the transistor is considered OFF.

In order to ensure that current through the transistor 11 reduces when the switch 12 is closed, the diode 14 needs to be current limiting, i.e. it does not have the capacity to carry the maximum current that can be supplied by the current source 13 as well as the current from the transistor 11.

In the afore described circuit arrangement, the transistor 11 can be treated as operating as a normally on transistor as the transistor 11 is ON when there is no signal applied to the base.

The circuit of Figure 1 can be used to implement an inverter (NOT) logic gate. When the base is connected to a signal source (input ON), i.e. the current source 13, current flow at the collector side of the transistor 11 will be substantially zero (output OFF). In contrast when the base is disconnected from the signal source (input OFF) there will be current through the collector (output ON).

Notwithstanding the above stated desire for leakage current to be kept as low as possible whilst ensuring the transistor is ON, an increased current flow through the diode 14 provides a faster switching speed of the transistor 11.

Increased current flow through the diode 14 is achieved by increasing the voltage across the diode 14 by altering the reference voltage seen by the second terminal of the diode 14. However, in addition to the drawback described above, increasing the current through the diode 14 also increases the power consumption of the circuit 10. In the application of a logic gate, by altering the voltage that the second terminal of the diode 14 sees over time, such that there is a larger voltage across the diode 14 when the transistor 11 is expected to switch and a lower voltage across the diode 14 when the transistor 11 is expected not to be switching (static), it is possible to obtain the advantage of a fast switching speed whilst minimising the increase in power consumption of the circuit 10 compared with if the voltage across the diode was high all the time.

In the embodiment of Fig 1 this is achieved using the switching circuitry 15 to switch connection of the second terminal of the diode 14 between either V _L , where a larger voltage drop across diode 14 is desired, or V _H where a smaller voltage drop over diode 14 is desired.

Figure 2 are timing diagrams illustrating how this may be implemented. The square wave line CLK represents the clock signal 16 used to coordinate actions of logic circuitry comprised from logic gates implemented using the transistor and diode arrangement of Figure 1. Immediately below the clock signal CLK is a representation of the logic state (LOS) of the logic circuitry during the clock cycles. Where LOS is composed of a single line the logic state of the circuitry is resolved, i.e. static; where the LOS is composed of two lines the logic state is unresolved as the circuit is settling. Ideally the circuit settles marginally before the end of a clock cycle so as to minimise the duration of the static state as far as possible.

Line VSEE illustrates an example of how the reference voltage seen by the second terminals of the diodes 14 in the circuitry can be changed during a clock cycle in order to provide increased switching speed. VACROSS illustrates the corresponding change of voltage across the diodes 14.

At the beginning of a clock cycle the switching circuitry 15 operates to connect the second terminal to V _L such that the voltage across the diodes 14 increases. Whilst VACROSS is high, the transistors 11 in the logic circuitry associated with said diodes 14 switch faster leading to a shorter overall settling time of the logic circuitry compared with if V _H had remained high. Before the end of the clock cycle, the switching circuitry 15 operates to switch the second terminal to V _H such that the voltage across the diodes 14 drops; represented by VACROSS decreasing. Whilst VACROSS is low, the transistors 11 switch comparatively slower (if the switch is made before the circuit has settled), increasing the overall settling time of the circuitry, but reducing power consumption of the circuitry.

The duration that VACROSS remains high within a clock cycle can be set to provide a fine adjustment of the overall settling time of the circuit.

A coarser adjustment of the overall settling time is provided by selecting the magnitude in difference between V _L and V _H.

For the reasons discussed above, it is favourable that the value of V _H is selected such that when VH is connected to the second terminal of diode 14, it results in the minimum leakage current though the diode 14 required to keep the transistor 11 ON.

The value of V _L is selected depending on the increase in switching speed desired compared with that obtained when V _H is connected.

These fine and course adjustments can be used to set up the logic circuitry to achieve a desired settling time, e.g. to match a clock speed that it is desired for the circuit to run at. In this embodiment the clock cycle has a duty ratio of -50%; this is not essential. Further, activation occurs on the rising edge of the clock signal; it will be appreciated that the falling edge or both edges could be used instead.

Figure 3 illustrates a variant circuit arrangement to Figure 1 in which the switching circuitry is replaced by a dynamic voltage source 18, for example an external voltage source, which is connected to the second terminal of the diode 14 about a terminal 18A. The dynamic voltage source 18 is arranged to receive the clock signal 16 and in response to vary the voltage at a terminal 18A over the period of a clock cycle.

Returning to Figure 2, VSEE-A illustrates an example of an analogue voltage seen at the second terminal of the diode 14 as a result of its connection with the variable voltage source 18. As with VSEE, the voltage is arranged to be low near the beginning of each cycle, when a fast switching speed is desired, and to rise towards the end of the cycle when the circuit is likely to be static. The form of the voltage curve over the cycle is asymmetric in order that the voltage across the diode is relatively high for a longer period of each cycle than it is relatively low. This can be reversed when a slower circuitry resolving time is desired.

Although the invention has been described in relation to digital logic circuits, it has broader application to any circuit including a transistor where there may be a benefit in increasing switching speed, for example an analogue multiplexer or analogue- digital converter (ADC) or digital-analogue converter.

For certain applications it may be preferable to control switching manually. In such cases the switching circuitry may be arranged to receive a user input signal, in addition or instead of a clock signal in order to alter the reference voltage connected to the second terminal of the diode.

The switching circuitry 15 may be arranged to switch between more than two reference voltages to provide more than one ‘lower’ voltage. One or more of the voltages VL VH may be dynamic voltages.

Figures 1 and 3 illustrate the current source 13 and switch 12 generically to ease understanding. In most practical implementations the base of the transistor will be connected to the output of another logic circuit(s) (earlier stage), with current ultimately derived from the high rail as opposed to an independent current source. Where so, the circuit is designed so that the impedance of the circuitry from the high rail to the base terminal is lower than the impedance between the emitter and the base of the transistor.

The use of a zener diode in a reverse biased arrangement with a voltage across it that is below its zener voltage is preferred because it provides operational stability, especially when the zener voltage is selected to minimise the diode’s thermal coefficient. Nevertheless, other diode configurations are possible. For example where the diode is small enough and thus highly current limiting, it may be used in a normal biased arrangement. It is also possible that other type of diode be used, e.g. tunnel diodes. A tunnel diode may be used in a forward biased condition with the voltage across the diode being below the higher voltage that demarks the negative resistance region of the tunnel diode.

It will be appreciated that the circuits described above can similarly be implemented using NPN transistor. With the NPN form the voltage across the emitter and second terminal of the diode is arranged such that conventional current flows from the second terminal of the diode, through the diode, into the base terminal and out through the emitter, and that the signal source is a current sink. In such an arrangement V _L and V _H would be high side voltages, i.e. higher than the emitter side voltage of the NPN transistor, and the timing of switching there between reversed compared with that described above for a PNP transistor.