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Patent Searching and Data


Title:
LINEAR CHIRP SIGNAL GENERATOR
Document Type and Number:
WIPO Patent Application WO/2017/056287
Kind Code:
A1
Abstract:
A signal generator according to the present invention is characterized by being provided with a reference signal source for outputting a clock signal, a phase-locked-loop (PLL) circuit for using the clock signal to generate a chirp signal from a feedback-loop-type circuit including a frequency divider, and a linearity enhancement processor for detecting the frequency of the Mth (where M is an integer greater than or equal to 1) period of the chirp signal generated by the PLL circuit and controlling the frequency division number of the frequency divider so that the differences between the frequencies of the chirp signals generated at M+1th and subsequent periods by the PLL circuit and a desired frequency are smaller than the difference between the detected frequency and the desired frequency. As a result of this feature, it is possible to avoid stopping a RADAR system and correct chirp signal linearity degradation, including the influence of a PLL circuit closed-loop configuration and an LF time constant.

Inventors:
WADA OSAMU (JP)
MIZUTANI HIROYUKI (JP)
TAJIMA KENICHI (JP)
HIEDA MORISHIGE (JP)
Application Number:
PCT/JP2015/077927
Publication Date:
April 06, 2017
Filing Date:
October 01, 2015
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
G01S13/34; G01S7/40
Domestic Patent References:
WO2009028010A12009-03-05
Foreign References:
JP2013217854A2013-10-24
JP2011127923A2011-06-30
JPH09238075A1997-09-09
JP2010071899A2010-04-02
JPH05347558A1993-12-27
JP2002529747A2002-09-10
JP2014062824A2014-04-10
JPH10341157A1998-12-22
Other References:
KAZUHIDE HIGUCHI: "A Method of Detecting FM Chirp Signal Frequency", PROCEEDINGS OF THE 2015 IEICE GENERAL CONFERENCE, ELECTRONICS 1, March 2015 (2015-03-01), pages 111
S.AYHAN ET AL.: "FPGA controlled DDS basedFrequency Sweep Generation of High Linearityfor FMCW Radar Systems", MICROWAVE CONFERENCE (GEMIC, March 2012 (2012-03-01), German, pages 1 - 4, XP032169143
M.PICHLER ET AL.: "Phase-Error Measurement and Compensation in PLL Frequency Synthesizers for FMCW Sensors-II: Theory, Circuits and Systems I: Regular Papers", IEEE TRANSACTIONS, vol. 54, no. 6, June 2007 (2007-06-01), pages 1224 - 1235, XP011185326
Attorney, Agent or Firm:
INABA, Tadahiko et al. (JP)
Tadahiko Inaba (JP)
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