Title:
LOW-DROPOUT LINEAR VOLTAGE-STABILIZING CIRCUIT AND ELECTRONIC DEVICE
Document Type and Number:
WIPO Patent Application WO/2020/093268
Kind Code:
A1
Abstract:
Provided in the embodiments are a low drop-out linear voltage-stabilizing circuit and an electronic device. The low drop-out linear voltage-stabilizing circuit comprises an error amplification circuit and an output circuit, wherein the error amplification circuit comprises a first cascode circuit and a second cascode circuit, wherein the first cascode circuit comprises a first voltage feedback point, and the second cascode circuit comprises a second voltage feedback point; the output circuit comprises a first feedback capacitor and a second feedback capacitor, the first feedback capacitor is in bridge connection between the first voltage feedback point and the output voltage of the output circuit, and the second feedback capacitor is in bridge connection between the second voltage feedback point and the output voltage of the output circuit. According to the embodiments of the present disclosure, by means of the Miller compensation of double loops, loops are more stable, the response speed is faster, the drop voltage is smaller, a higher bandwidth can be obtained, the used capacitance area is smaller, and chip integration is facilitated.
Inventors:
XIE YIZHENG (CN)
WU JIAXUN (CN)
WU JIAXUN (CN)
Application Number:
PCT/CN2018/114364
Publication Date:
May 14, 2020
Filing Date:
November 07, 2018
Export Citation:
Assignee:
BITMAIN TECH INC (CN)
International Classes:
G05F1/563
Foreign References:
| CN102279612A | 2011-12-14 | |||
| JP2014090306A | 2014-05-15 | |||
| CN106708151A | 2017-05-24 |
Attorney, Agent or Firm:
LEADER PATENT & TRADEMARK FIRM (CN)
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