Title:
MEMORY DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/286548
Kind Code:
A1
Abstract:
A voltage adjustment circuit (60, 70, 80) is provided with: a digital-analog conversion unit (62, 72, 82); a comparator (61, 71, 83A) that includes a first input end into which a predetermined voltage can be input and a second input end into which a voltage based on the output of the digital analog conversion unit is input; and a control unit (2) that outputs DAC data to the digital analog conversion unit. The control unit performs a first search in which bits of the DAC data are determined in order starting with a higher-order bit, on the basis of an output result of the comparator.
Inventors:
KOKUSHO YUICHI (JP)
Application Number:
PCT/JP2022/024891
Publication Date:
January 19, 2023
Filing Date:
June 22, 2022
Export Citation:
Assignee:
ROHM CO LTD (JP)
International Classes:
H02M3/155; G05F1/56
Foreign References:
| JP2000049609A | 2000-02-18 | |||
| JP2010045944A | 2010-02-25 | |||
| JP2018166322A | 2018-10-25 |
Attorney, Agent or Firm:
SANO PATENT OFFICE (JP)
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