Title:
MEMRISTOR MEMORY CHIP AND OPERATION METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2021/051551
Kind Code:
A1
Abstract:
A memristor chip and an operation method therefor. The chip comprises a power supply management module (6), a decoding module, a memory module (1), a logic control module (4), a read/write module (5), and an I/O module (7); the read/write module (5) performs a corresponding operation on a memory array after address selection according to a control signal provided by the logic control module (4); an interface module is used for outputting data read by the read/write module (5); a word line voltage conversion module (3) is provided between a row decoder (23) of the decoding module and the memory module (1), and in this way, a voltage input to the gate of a word line transistor in the memory array is an adjusted voltage. According to the bipolar memristor chip and the operation method therefor, the possibility of the memristor memory device failing after current limiting is reduced, the high and low resistance distribution of the device will be more uniform, data reading is stable and the service life of the device is significantly prolonged, and when the invention is applied to a multi-valued memristive device, the resistance state after current limiting will be correspondingly stable.
Inventors:
WANG XINGSHENG (CN)
HUANG ENMING (CN)
MIAO XIANGSHUI (CN)
HUANG ENMING (CN)
MIAO XIANGSHUI (CN)
Application Number:
PCT/CN2019/117436
Publication Date:
March 25, 2021
Filing Date:
November 12, 2019
Export Citation:
Assignee:
UNIV HUAZHONG SCIENCE TECH (CN)
International Classes:
G11C11/21
Foreign References:
| US20110235394A1 | 2011-09-29 | |||
| CN103198860A | 2013-07-10 |
Other References:
JIN GANG , WU YUXIN , ZHANG JI , HUANG XIAOHUI , WU JINGANG , LIN YINYIN: "Design and Realization of a 0. 13um 1 Mb Resistive Random Access Memory", RESEARCH & PROGRESS OF SSE, vol. 31, no. 2, 25 April 2011 (2011-04-25), pages 174 - 179, XP055792566, ISSN: 1000-3819
JIAO BIN , DENG NING , CHEN PEIYI: "Progress in Development of Resistive RAM Peripheral Circuit", RESEARCH & PROGRESS OF SSE, vol. 33, no. 4, 25 August 2013 (2013-08-25), pages 363 - 370, XP055792573, ISSN: 1000-3819
JIAO BIN , DENG NING , CHEN PEIYI: "Progress in Development of Resistive RAM Peripheral Circuit", RESEARCH & PROGRESS OF SSE, vol. 33, no. 4, 25 August 2013 (2013-08-25), pages 363 - 370, XP055792573, ISSN: 1000-3819
Attorney, Agent or Firm:
WUHAN DONGYU PATENT AGENCY (CN)
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