Title:
METHOD AND CIRCUIT FOR MEASURING RETENTION TIME OF TIME SEQUENCE UNIT
Document Type and Number:
WIPO Patent Application WO/2021/238838
Kind Code:
A1
Abstract:
A method and circuit for measuring the retention time of a time sequence unit. The method comprises: determining a first period value, a second period value and a third period value of a clock signal separately, wherein the first period value is a critical period of the clock signal when a time sequence unit (170) to be measured is able to correctly receive a data signal under a first test path, the second period value is a critical period of the clock signal when a delay detection module (140) is able to correctly receive the data signal under a second test path, and the third period value is a critical period of the clock signal when the delay detection module (140) is able to correctly receive the data signal under a third test path (S210); and determining the retention time of the time sequence unit according to the first period value, the second period value and the third period value (S220).
Inventors:
PENG MINQIANG (CN)
YE SHENG (CN)
YE SHENG (CN)
Application Number:
PCT/CN2021/095441
Publication Date:
December 02, 2021
Filing Date:
May 24, 2021
Export Citation:
Assignee:
ZTE CORP (CN)
International Classes:
G01R31/317; G01R31/28; G11C29/56
Foreign References:
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| US20080141198A1 | 2008-06-12 |
Attorney, Agent or Firm:
TEE&HOWE INTELLECTUAL PROPERTY ATTORNEYS (CN)
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