Title:
METHOD AND DEVICE FOR REPAIRING FAIL BITS
Document Type and Number:
WIPO Patent Application WO/2022/037201
Kind Code:
A1
Abstract:
A method and apparatus for repairing fail bits, relating to the technical field of integrated circuits, and able to be applied to a scenario in which fail bits in a chip are to be repaired. The method comprises: determining regions to be repaired in a chip to be repaired (S110); using a backup circuit to perform first reparation processing on first fail bits (S120); determining the bit positions of second fail bits in each target repair region, and performing second reparation processing on the second fail bits (S130); determining non-repaired fail bits in each target repair region, and determining candidate repair groups and a candidate group quantity (S140); and if the candidate group quantity is greater than a group quantity threshold, determining target repair positions, and using a backup word line to perform repair processing on the target repair positions; the target repair positions being the positions of fail bits in a maximally reduced candidate group quantity after reparation processing (S150). The present method is able to avoid the problem of an inability to find optimal repair groups for fail bits leading to a determination that a chip to be repaired cannot be repaired.
Inventors:
CHEN YUI-LANG (CN)
Application Number:
PCT/CN2021/099173
Publication Date:
February 24, 2022
Filing Date:
June 09, 2021
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
G11C29/44
Foreign References:
| CN1404140A | 2003-03-19 | |||
| CN103473160A | 2013-12-25 | |||
| CN103871447A | 2014-06-18 | |||
| US20150178614A1 | 2015-06-25 |
Other References:
See also references of EP 3985675A4
Attorney, Agent or Firm:
BEIJING INTELLEGAL INTELLECTUAL PROPERTY AGENT LTD. (CN)
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