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Patent Searching and Data


Title:
METHOD FOR PRODUCING SILICON WAFER, AND SILICON WAFER
Document Type and Number:
WIPO Patent Application WO/2020/158376
Kind Code:
A1
Abstract:
The present invention is a method for producing a silicon wafer, the method including a step for chamfering a silicon wafer that has a notch, a step for lapping the main surface or cutting both surfaces, an etching step, and a mirror surface chamfering step, wherein in the chamfering step, a chamfering process is performed so that inclination angles θ1 and θ2 of inclined parts of the notch reach 12° or less, where θ1 is defined as the inclination angle of an inclined part connected to the first main surface of the silicon wafer relative to the first main surface, and θ2 is defined as the inclination angle of an inclined part connected to the second main surface of the silicon wafer relative to the second main surface, in a cross-sectional shape of a chamfered part of the notch in the silicon wafer. There are thereby provided a method for producing a silicon wafer, and a silicon wafer, with which it is possible to suppress the generation, on the inclined parts of the notch due to etching, of protrusions that would be a source of grinding residue, and to prevent the production of grinding residue derived from protrusions on the inclined parts of the notch in the finished wafer.

Inventors:
KOIDE MASAMICHI (JP)
Application Number:
PCT/JP2020/000946
Publication Date:
August 06, 2020
Filing Date:
January 15, 2020
Export Citation:
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Assignee:
SHINETSU HANDOTAI KK (JP)
International Classes:
B24B7/22; B24B9/00; H01L21/304
Domestic Patent References:
WO2008093488A12008-08-07
WO2011142159A12011-11-17
Foreign References:
JPH11219923A1999-08-10
JPH11348031A1999-12-21
JPH05198543A1993-08-06
Attorney, Agent or Firm:
YOSHIMIYA Mikio et al. (JP)
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