Title:
METHOD AND SYSTEM FOR SYNCHRONIZING CLOCKS IN SDH NETWORK
Document Type and Number:
WIPO Patent Application WO/2016/106908
Kind Code:
A1
Abstract:
A method and system for synchronizing clocks in an SDH network. In the method, a slave clock device determines, according to a PTP synchronization message transmitted between itself and a primary master clock device and stored time delay between itself and the primary master clock device, a master and slave clock deviation value between itself and the primary master clock device, and performs time tick with the primary master clock device when it is determined that the master and slave clock deviation value is within the range of a set first threshold value, and otherwise performs time tick with other standby master clock devices. Since in the embodiments of the present invention the slave clock device establishes a time tick channel with master clock devices in a plurality of different SDH paths at the same time, during the time tick, it can be determined whether the current time tick process is accurate according to the currently calculated master and slave clock deviation value, so as to determine whether a fault occurs to the time tick channel and the master clock devices, thereby ensuring the accuracy of the time tick.
Inventors:
WANG LIWEN (CN)
Application Number:
PCT/CN2015/071528
Publication Date:
July 07, 2016
Filing Date:
January 26, 2015
Export Citation:
Assignee:
KYLAND TECHNOLOGY CO LTD (CN)
International Classes:
H04J3/06
Foreign References:
| CN103001720A | 2013-03-27 | |||
| CN104113386A | 2014-10-22 | |||
| CN103188064A | 2013-07-03 | |||
| CN103312428A | 2013-09-18 |
Attorney, Agent or Firm:
TDIP & PARTNERS (CN)
北京同达信恒知识产权代理有限公司 (CN)
北京同达信恒知识产权代理有限公司 (CN)
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