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Title:
MICROCONTROLLER WITH AN INTERRUPT STRUCTURE HAVING PROGRAMMABLE PRIORITY LEVELS WITH EACH PRIORITY LEVEL ASSOCIATED WITH A DIFFERENT REGISTER SET
Document Type and Number:
WIPO Patent Application WO2005010747
Kind Code:
A3
Abstract:
Typically, for processing systems it must be guaranteed that all interrupted program stream parameters are restored before the execution of the first program stream resumes. If during this transfer an interrupt occurs, then all data may not be stored or restored. If the error free storage of the program register contents and other critical first program stream data does not occur, the processor (180) has no way of knowing whether the first program stream data restored to the registers has become corrupt or not. Thus, a novel register architecture (120, 121, 122, 123, 124, 125) is provided that facilitate processing of interrupting program streams without storing and restoring interrupted program stream critical data.

Inventors:
SHRIVASTAVA PANKAJ (US)
GOODHUE GREGORY (US)
KHAN ATA (US)
DING ZHIMIN (US)
MACKENNA CRAIG (US)
Application Number:
PCT/IB2004/051332
Publication Date:
March 17, 2005
Filing Date:
July 29, 2004
Export Citation:
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Assignee:
KONINKL PHILIPS ELECTRONICS NV (NL)
SHRIVASTAVA PANKAJ (US)
GOODHUE GREGORY (US)
KHAN ATA (US)
DING ZHIMIN (US)
MACKENNA CRAIG (US)
International Classes:
G06F9/46; G06F9/48; G06F13/26; (IPC1-7): G06F9/46
Foreign References:
EP0441054A11991-08-14
US5155853A1992-10-13
EP1124185A12001-08-16
Other References:
"REGISTER BANKING FOR IBM SYSTEM/370", IBM TECHNICAL DISCLOSURE BULLETIN, IBM CORP. NEW YORK, US, vol. 34, no. 4B, 1 September 1991 (1991-09-01), pages 372 - 373, XP000189622, ISSN: 0018-8689
PATENT ABSTRACTS OF JAPAN vol. 1997, no. 06 30 June 1997 (1997-06-30)
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