BACKGROUND

Field

[0001] Embodiments of the invention relate to electronic systems, and in particular, to power amplifiers for radio frequency (RF) electronics.

Description of the Related Technology

[0002] Power amplifiers are used in RF communication systems to amplify RF signals for transmission via antennas. It is important to manage the power of RF signal transmissions to prolong battery life and/or provide a suitable transmit power level.

[0003] Examples of RF communication systems with one or more power amplifiers include, but are not limited to, mobile phones, tablets, base stations, network access points, customer-premises equipment (CPE), laptops, and wearable electronics. For example, in wireless devices that communicate using a cellular standard, a wireless local area network (WLAN) standard, and/or any other suitable communication standard, a power amplifier can be used for RF signal amplification. An RF signal can have a frequency in the range of about 30 kHz to 300 GHz, such as in the range of about 410 MHz to about 7.125 GHz for Fifth Generation (5G) cellular communications in Frequency Range 1 (FR1).

SUMMARY

[0004] In certain embodiments, the present disclosure relates to an envelope tracking system. The envelope tracking system includes a power amplifier configured to amplify a radio frequency signal and to receive power from a power amplifier supply voltage, and an envelope tracker configured to generate the power amplifier supply voltage based on an analog envelope signal corresponding to an envelope of the radio frequency signal. The envelope tracker includes a DC-to-DC converter configured to output a plurality of regulated voltages, a modulator configured to generate a modulator output voltage at an output based on the plurality of regulated voltages and the analog envelope signal, and a modulator output filter coupled between the output of the modulator and the power amplifier supply voltage, the modulator configured to generate the modulator output voltage based on comparing the analog envelope signal to a plurality of signal thresholds. [0005] In some embodiments, the modulator includes a plurality of switches selectively activated based on comparing the analog envelope signal to the plurality of signal thresholds. According to a number of embodiments, each of the plurality of switches is connected between the output of the modulator and a corresponding one of the plurality of regulated voltages.

[0006] In various embodiments, the envelope tracker further includes a plurality of modulators including the modulator and a plurality of modulator output filters including the modulator output filter, each of the plurality of modulators coupled to the power amplifier supply voltage by way of a corresponding one of the plurality of modulator output filters. According to a number of embodiments, an active number of the plurality of modulators is selected based on comparing the analog envelope signal to the plurality of signal thresholds.

[0007] In several embodiments, the modulator is configured to receive the analog envelope signal over a Mobile Industry Peripheral Interface Analog Reference Interface for Envelope Tracking.

[0008] In some embodiments, the analog envelope signal is a differential envelope signal. According to a number of embodiments, the modulator includes a differential envelope amplifier configured to amplify the differential envelope signal to generate a single-ended envelope signal. In accordance with various embodiments, the modulator further includes a plurality of comparators each configured to compare the single-ended envelope signal to a corresponding one of the plurality of signal thresholds. According to several embodiments, the differential envelope amplifier includes an amplification circuit configured to amplify the differential envelope signal, and a common mode feedback circuit operable to compensate the amplification circuit for a common mode error arising from a common mode voltage of the differential envelope signal. In accordance with a number of embodiments, the amplification circuit includes a first differential input configured to receive the differential envelope signal and a second differential input configured to receive a differential compensation signal from the common mode feedback circuit. According to various embodiments, the common mode feedback circuit is configured to provide feedback from an output of the amplification circuit to the second differential input of the amplification circuit. In accordance with several embodiments, the differential envelope amplifier further includes a differential input filter configured to filter the differential envelope signal prior to amplification by the amplification circuit.

[0009] In some embodiments, each of the plurality of signal thresholds is controllable.

[0010] In various embodiments, the envelope tracker further includes a DC path filter coupled between a DC voltage and the power amplifier supply voltage. According to a number of embodiments, the DC-to-DC converter is further configured to generate the DC voltage. In accordance with several embodiments, the DC-to-DC converter is configured to receive a battery voltage, and to generate the plurality of regulated voltages and the DC voltage based on providing DC-to-DC conversion of the battery voltage. According to a number of embodiments, the DC path filter includes at least one series inductor and at least one shunt capacitor. In accordance with some embodiments, a DC path through the DC path filter carries at least seventy five percent of the energy provided from the envelope tracker to the power amplifier.

[0011] In several embodiments, each of the plurality of regulated voltages has a different voltage level.

[0012] In some embodiments, the envelope tracker further includes a plurality of decoupling capacitors each coupled between ground and a corresponding one of the plurality of regulated voltages.

[0013] In various embodiments, the modulator output filter includes at least one series inductor and at least one shunt capacitor. According to a number of embodiments, the modulator output filter further includes a DC blocking capacitor in series between the modulator output voltage and the power amplifier supply voltage.

[0014] In certain embodiments, the present disclosure relates to an envelope tracker. The envelope tracker includes a power amplifier supply voltage terminal configured to output a power amplifier supply voltage for a power amplifier, a DC-to-DC converter configured to output a plurality of regulated voltages based on regulating a battery voltage, a modulator output filter, and a modulator including an output coupled to the power amplifier supply voltage terminal through the modulator output filter. The modulator is configured to generate a modulator output voltage at the output based on the plurality of regulated voltages and an analog envelope signal, and to generate the modulator output voltage based on comparing the analog envelope signal to a plurality of signal thresholds. [0015] In some embodiments, the modulator includes a plurality of switches selectively activated based on comparing the analog envelope signal to the plurality of signal thresholds. According to various embodiments, each of the plurality of switches is connected between the output of the modulator and a corresponding one of the plurality of regulated voltages. In accordance with a number of embodiments, the envelope tracker further includes a plurality of modulators including the modulator and a plurality of modulator output filters including the modulator output filter, each of the plurality of modulators coupled to the power amplifier supply voltage terminal by way of a corresponding one of the plurality of modulator output filters. According to several embodiments, an active number of the plurality of modulators is selected based on comparing the analog envelope signal to the plurality of signal thresholds.

[0016] In various embodiments, the modulator is configured to receive the analog envelope signal over a Mobile Industry Peripheral Interface Analog Reference Interface for Envelope Tracking.

[0017] In some embodiments, the analog envelope signal is a differential envelope signal. According to several embodiments, the modulator includes a differential envelope amplifier configured to amplify the differential envelope signal to generate a single-ended envelope signal. In a number of embodiments, the modulator further includes a plurality of comparators each configured to compare the single-ended envelope signal to a corresponding one of the plurality of signal thresholds. According to various embodiments, the differential envelope amplifier includes an amplification circuit configured to amplify the differential envelope signal, and a common mode feedback circuit operable to compensate the amplification circuit for a common mode error arising from a common mode voltage of the differential envelope signal. In accordance with several embodiments, the amplification circuit includes a first differential input configured to receive the differential envelope signal and a second differential input configured to receive a differential compensation signal from the common mode feedback circuit. According to a number of embodiments, the common mode feedback circuit is configured to provide feedback from an output of the amplification circuit to the second differential input of the amplification circuit. In accordance with various embodiments, the differential envelope amplifier further includes a differential input filter configured to filter the differential envelope signal prior to amplification by the amplification circuit. [0018] In several embodiments, each of the plurality of signal thresholds is controllable.

[0019] In some embodiments, the envelope tracker further includes a DC path filter coupled between a DC voltage and the power amplifier supply voltage terminal. According to a number of embodiments, the DC-to-DC converter is further configured to generate the DC voltage. In accordance with various embodiments, the DC-to-DC converter is configured to receive a battery voltage, and to generate the plurality of regulated voltages and the DC voltage based on providing DC-to-DC conversion of the battery voltage. According to several embodiments, the DC path filter includes at least one series inductor and at least one shunt capacitor. In accordance with a number of embodiments, a DC path through the DC path filter carries at least seventy five percent of the energy provided to the power amplifier supply voltage terminal.

[0020] In various embodiments, each of the plurality of regulated voltages has a different voltage level.

[0021] In several embodiments, the envelope tracker further includes a plurality of decoupling capacitors each coupled between ground and a corresponding one of the plurality of regulated voltages.

[0022] In some embodiments, the modulator output filter includes at least one series inductor and at least one shunt capacitor. According to a number of embodiments the modulator output filter further includes a DC blocking capacitor in series between the output of the modulator and the power amplifier supply voltage terminal·

[0023] In certain embodiments, the present disclosure relates to a mobile device. The mobile device includes a transceiver configured to generate a radio frequency transmit signal, a front end circuit including a power amplifier configured to amplify the radio frequency transmit signal and to receive power from a power amplifier supply voltage, and a power management circuit including an envelope tracker configured to generate the power amplifier supply voltage based on an analog envelope signal corresponding to an envelope of the radio frequency transmit signal. The envelope tracker includes a DC-to-DC converter configured to output a plurality of regulated voltages, a modulator configured to generate a modulator output voltage at an output based on the plurality of regulated voltages and the analog envelope signal, and a modulator output filter coupled between the output of the modulator and the power amplifier supply voltage. The modulator is configured to generate the modulator output voltage based on comparing the analog envelope signal to a plurality of signal thresholds.

[0024] In various embodiments, the modulator includes a plurality of switches selectively activated based on comparing the analog envelope signal to the plurality of signal thresholds. According to a number of embodiments, each of the plurality of switches is connected between the output of the modulator and a corresponding one of the plurality of regulated voltages.

[0025] In several embodiments, the envelope tracker further includes a plurality of modulators including the modulator and a plurality of modulator output filters including the modulator output filter, each of the plurality of modulators coupled to the power amplifier supply voltage by way of a corresponding one of the plurality of modulator output filters. According to a number of embodiments, an active number of the plurality of modulators is selected based on comparing the analog envelope signal to the plurality of signal thresholds.

[0026] In various embodiments, the modulator is configured to receive the analog envelope signal over a Mobile Industry Peripheral Interface Analog Reference Interface for Envelope Tracking.

[0027] In some embodiments, the analog envelope signal is a differential envelope signal. According to a number of embodiments, the modulator includes a differential envelope amplifier configured to amplify the differential envelope signal to generate a single-ended envelope signal. In accordance with several embodiments, the modulator further includes a plurality of comparators each configured to compare the single-ended envelope signal to a corresponding one of the plurality of signal thresholds. According to various embodiments, the differential envelope amplifier includes an amplification circuit configured to amplify the differential envelope signal, and a common mode feedback circuit operable to compensate the amplification circuit for a common mode error arising from a common mode voltage of the differential envelope signal. In accordance with a number of embodiments, the amplification circuit includes a first differential input configured to receive the differential envelope signal and a second differential input configured to receive a differential compensation signal from the common mode feedback circuit. According to various embodiments, the common mode feedback circuit is configured to provide feedback from an output of the amplification circuit to the second differential input of the amplification circuit. In accordance with several embodiments, the differential envelope amplifier further includes a differential input filter configured to filter the differential envelope signal prior to amplification by the amplification circuit.

[0028] In various embodiments, each of the plurality of signal thresholds is controllable.

[0029] In several embodiments, the envelope tracker further includes a DC path filter coupled between a DC voltage and the power amplifier supply voltage. According to a number of embodiments, the DC-to-DC converter is further configured to generate the DC voltage. In accordance with some embodiments, the mobile device further includes a battery that outputs a battery voltage, the DC-to-DC converter configured to generate the plurality of regulated voltages and the DC voltage based on providing DC-to-DC conversion of the battery voltage. According to various embodiments, the DC path filter includes at least one series inductor and at least one shunt capacitor. In accordance with a number of embodiments, a DC path through the DC path filter carries at least seventy five percent of the energy provided from the envelope tracker to the power amplifier.

[0030] In various embodiments, each of the plurality of regulated voltages has a different voltage level.

[0031] In some embodiments, the envelope tracker further includes a plurality of decoupling capacitors each coupled between ground and a corresponding one of the plurality of regulated voltages.

[0032] In several embodiments, the modulator output filter includes at least one series inductor and at least one shunt capacitor. According to a number of embodiments, the modulator output filter further includes a DC blocking capacitor in series between the modulator output voltage and the power amplifier supply voltage.

BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 is a schematic diagram of a mobile device according to one embodiment.

[0034] Figure 2 is a schematic diagram of one embodiment of an envelope tracking system for a power amplifier.

[0035] Figure 3 A is a schematic diagram of another embodiment of an envelope tracking system for a power amplifier. [0036] Figure 3B is a schematic diagram of another embodiment of an envelope tracking system for a power amplifier.

[0037] Figure 3C is a schematic diagram of another embodiment of an envelope tracking system for a power amplifier.

[0038] Figure 4 is a schematic diagram of another embodiment of an envelope tracking system for a power amplifier.

[0039] Figure 5 is a schematic diagram of another embodiment of an envelope tracking system for a power amplifier.

[0040] Figure 6A is a schematic diagram of one embodiment of a differential envelope amplifier for an envelope tracking system.

[0041] Figure 6B is a schematic diagram of another embodiment of a differential envelope amplifier for an envelope tracking system.

[0042] Figure 7 is a schematic diagram of one embodiment of an amplification circuit for a differential envelope amplifier.

[0043] Figure 8 is a graph of one example of differential analog envelope signal voltage versus time.

[0044] Figure 9 is a schematic diagram of one embodiment of comparator circuitry for a multi-level supply (MLS) modulator.

[0045] Figure 10 is a schematic diagram of embodiment of a comparator for the comparator circuitry of Figure 9.

[0046] Figure 11 is a schematic diagram of a mobile device according to another embodiment.

[0047] Figure 12 is a schematic diagram of one embodiment of a communication system for transmitting radio frequency (RF) signals.

[0048] Figure 13 is a schematic diagram of an MLS modulation system according to one embodiment.

[0049] Figure 14 is a schematic diagram of an MLS DC-to-DC converter according to one embodiment.

[0050] Figure 15 is a schematic diagram of one example of timing for MLS DC- to-DC conversion.

[0051] Figure 16 is a schematic diagram of one example of MLS envelope tracking for a continuous wave signal. DET AILED DESCRIPTION OF EMBODIMENTS

[0052] The following detailed description of certain embodiments presents various descriptions of specific embodiments. However, the innovations described herein can be embodied in a multitude of different ways, for example, as defined and covered by the claims. In this description, reference is made to the drawings where like reference numerals can indicate identical or functionally similar elements. It will be understood that elements illustrated in the figures are not necessarily drawn to scale. Moreover, it will be understood that certain embodiments can include more elements than illustrated in a drawing and/or a subset of the elements illustrated in a drawing. Further, some embodiments can incorporate any suitable combination of features from two or more drawings.

[0053] Envelope tracking is a technique that can be used to increase power added efficiency (PAE) of a power amplifier by efficiently controlling a voltage level of a power amplifier supply voltage in relation to an envelope of a radio frequency (RF) signal amplified by the power amplifier. Thus, when the envelope of the RF signal increases, the voltage supplied to the power amplifier can be increased. Likewise, when the envelope of the RF signal decreases, the voltage supplied to the power amplifier can be decreased to reduce power consumption.

[0054] Multi-level envelope trackers with an analog interface are provided herein. In certain embodiments, an envelope tracking system for generating a power amplifier supply voltage for a power amplifier is provided. The envelope tracking system includes a multi-level supply (MLS) DC-to-DC converter that outputs multiple regulated voltages, an MLS modulator that controls selection of the regulated voltages over time based on an analog envelope signal corresponding to an envelope of the RF signal amplified by the power amplifier, and a modulator output filter coupled between an output of the MLS modulator and the power amplifier supply voltage.

[0055] The MLS modulator processes the analog envelope signal to control modulation operations. For example, in certain implementations, the MLS modulator includes two or more comparators for comparing the signal level of the analog envelope signal to different threshold levels. Additionally, the output signals of the comparators are used to control selection of the modulator’ s switches to thereby control modulation.

[0056] In certain implementations, the analog envelope signal is received over a Mobile Industry Peripheral Interface (MIPI) Analog Reference Interface for Envelope Tracking (eTrak). Additionally, the MLS modulator processes the analog envelope signal to control operations of the MLS modulator. Thus, the teachings herein can be used to reuse a MIPI eTrak interface for multi-level envelope tracking.

[0057] To enhance granularity of control over modulation, in certain implementations the envelope tracking system includes two or more modulators and two or more corresponding modulator output filters that operate in parallel with one another to generate the power amplifier supply voltage based on the analog envelope signal and the regulated voltages. Including multiple modulators can provide a finer resolution of quantization. For example, any number of the modulators can be activated at a given time to provide greater control over the power amplifier supply voltage relative to an implementation with a single modulator and a single modulator output filter.

[0058] In certain implementations, the envelope tracking system further includes a DC path filter coupled between a DC voltage and the power amplifier supply voltage. By including a DC path through the DC path filter and a separate AC path through the modulator output filter, enhanced efficiency of the envelope tracking system can be achieved.

[0059] For example, low frequency current, such as DC current, can be provided through the DC path filter (for instance, via a filter inductor), thereby relaxing size and/or DC resistance constraints of the modulator’s switches. Accordingly, lower switching losses in the AC path can be achieved, thereby enhancing overall system efficiency. In one example, the DC path carries at least 75% of the energy provided by envelope tracking system to the power amplifier.

[0060] In certain implementations, the DC voltage is a regulated voltage from a DC-to-DC converter. For example, the MLS DC-to-DC converter can also be used to generate the DC voltage. In such implementations, the voltage level of the DC voltage can be the same or different as the voltage level of one of the regulated voltages provided to the MLS modulator.

[0061] Figure 1 is a schematic diagram of a mobile device 70 according to one embodiment. The mobile device 70 includes a primary antenna 1, a diversity antenna 2, a primary antenna tuning circuit 3, a diversity antenna tuning circuit 4, a double-pole double throw (DPDT) antenna diversity switch 5, a primary front end module 6, a diversity front end module 7, a battery 8, an MLS envelope tracker 9, a transceiver 10, a baseband modem 11, and an application processor 12. [0062] Although one embodiment of a mobile device is shown, the teachings herein are applicable to mobile devices implemented in a wide variety of ways. Accordingly, other implementations are possible.

[0063] In the illustrated embodiment, the primary front end module 6 includes a first power amplifier 21 , a second power amplifier 22, a third power amplifier 23, a fourth power amplifier 24, a first low noise amplifier 31, a second low noise amplifier 32, a third low noise amplifier 33, a diplexer 42, a transmit/receive band switch 41, a transmit filter 43, a first duplexer 45, a second duplexer 46, a third duplexer 47, a first receive filter 51, a second receive filter 52, a third receive filter 53, a first directional coupler 59, and a second directional coupler 60. Additionally, the diversity front end module 7 includes a first low noise amplifier 35, a second low noise amplifier 36, a first receive filter 55, a second receive filter 56, a first receive band selection switch 61 , and a second receive band selection switch 62.

[0064] Although one embodiment of front end circuitry is shown, other implementations of front end circuitry are possible. For instance, front end circuitry can include power amplifiers (PAs), low noise amplifiers (LNAs), filters, switches, phase shifters, duplexers, and/or other suitable circuitry for processing RF signals transmitted and/or received from one or more antennas· Example functionalities of a front end include but are not limited to, amplifying signals for transmission, amplifying received signals, filtering signals, switching between different bands, switching between different power modes, switching between transmission and receiving modes, duplexing of signals, multiplexing of signals (for instance, diplexing or triplexing), or some combination thereof.

[0065] Accordingly, other implementations of primary front end modules, diversity receive front end modules, antenna selection, and/or antenna tuning can be used.

[0066] As shown in Figure 1 , the MLS envelope tracker 9 is used to generate one or more power amplifier supply voltages for power amplifiers used in the mobile device 70 to amplify RF signals for wireless transmission. In the illustrated embodiment, the MLS envelope tracker 9 receives a battery voltage VBATT from the battery 8, and generates a first power amplifier supply voltage VPAI for the first power amplifier 21 and a second power amplifier supply voltage V _PA 2 for the first power amplifier 22. Although an example in which the MLS envelope tracker 9 generates two power amplifier supply voltages is shown, the MLS envelope tracker 9 can generate more or fewer power amplifier supply voltages. [0067] The MLS envelope tracker 9 controls the first power amplifier supply voltage Vp _Ai to track an envelope of a first RF signal amplified by the first power amplifier 21. Additionally, the MLS envelope tracker 9 controls the second power amplifier supply voltage Vp _A 2 to track an envelope of a second RF signal amplified by the second power amplifier 22. In certain implementations, the MLS envelope tracker 9 receives digital data from the baseband modem 11. For example, the MLS envelope tracker 9 can receive digital data indicating an envelope of the first RF signal and an envelope of the second RF signal.

[0068] The battery 8 can be any suitable battery for use in the mobile device 70, including, for example, a lithium-ion battery. The battery voltage VBATT is regulated by a DC-to-DC converter of the MLS envelope tracker 9 to generate regulated voltages used for multi-level envelope tracking in accordance with the teachings herein.

[0069] The transceiver 10 generates RF signals for transmission and processes incoming RF signals received from the primary antenna 1 and the diversity antenna 2. It will be understood that various functionalities associated with the transmission and receiving of RF signals can be achieved by one or more components that are collectively represented in Figure 1 as the transceiver 10. In one example, separate components (for instance, separate circuits or dies) can be provided for handling certain types of RF signals.

[0070] The baseband modem 11 provides the transceiver 10 with digital representations of transmit signals, which the transceiver 10 processes to generate RF signals for transmission. The baseband modem 11 also processes digital representations of received signals provided by the transceiver 10.

[0071] As shown in Figure 1, the baseband modem 11 is coupled to the application processor 12, which serves to provide primary application processing in the mobile device 70. The application processor 12 can provide a wide variety of functions, such as providing system capabilities suitable for supporting applications, including, but not limited to, memory management, graphics processing, and/or multimedia decoding.

[0072] Although the mobile device 70 illustrates one example of an RF system including a multi-level envelope tracker, a wide variety of RF systems can include one or more multi-level envelope trackers implemented in accordance with the teachings herein.

[0073] Figures 2-5 depict schematic diagram of various embodiments of envelope tracking systems for a power amplifier. However, the teachings herein are applicable to envelope trackers implemented in a wide variety of ways. Accordingly, other implementations are possible. [0074] Figure 2 is a schematic diagram of one embodiment of an envelope tracking system 100 for a power amplifier 71. The envelope tracking system 100 includes an MLS DC-to-DC converter 72, a DC path filter 73, an MLS modulator 81, and a modulator output filter 91 that serves as an AC path filter, in this embodiment. The MLS DC-to-DC converter 72 is also referred to herein as a switching regulator.

[0075] The power amplifier 71 amplifies an RF input signal RF _IN to generate an RF output signal RF _OUT . The MLS modulator 81 receives an analog envelope signal (ENVELOPE), which changes in relation to an envelope of the RF input signal RF _IN . In certain implementations, the analog envelope signal corresponds to an envelope signal received from a MIPI eTrak interface. However, other implementations are possible.

[0076] In the illustrated embodiment, the MLS DC-to-DC converter 72 receives a battery voltage VBATT, and provides DC-to-DC conversion to generate a variety of regulated voltages VMLS , VMLSI>, VMLS _C . . . VMLS _II of different voltage levels. Although an example in which four MLS voltages is depicted, the MLS DC-to-DC converter 72 can generate more or fewer MLS voltages as indicated by the ellipses. In this embodiment, the MLS DC-to-DC converter 72 also generates the DC voltage VDC by regulating the battery voltage VBATT- The DC voltage VDC can be of the same or different voltage level as one of the regulated voltages V _M LSa, V _M LSb, VMLS _C · . . V _M LSn·

[0077] The MLS modulator 81 receives the regulated voltages V _MLS , V _MLSB , VMLS _C · . · VMLS _II and the analog envelope signal, and outputs a modulator output voltage to the modulator output filter 91. In certain implementations, the MLS modulator 81 controls the outputted voltage based on selecting a suitable regulated voltage over time based on the analog envelope signal. For example, the MLS modulator 81 can include a bank of switches for selectively connecting the regulated voltages VMLS , VMLSI>, VMLS _C . . . VMLS _II to the modulator’s output based on a signal level of the analog envelope signal.

[0078] In certain implementations, the MLS modulator 81 generates the modulator output voltage based on comparing the analog envelope signal to two or more signal thresholds. For example, the MLS modulator 81 can include two or more comparators that compare the analog envelope signal to different signal thresholds. Additionally, the MLS modulator 81 can include a plurality of switches each connected between the output of the MLS modulator 81 and a corresponding one of the regulated voltages, and the switches can be individually activated based on the comparisons. [0079] The DC path filter 73 and the modulator output filter 91 filter the DC voltage VDC from the MLS DC-to-DC converter 72 and the output of MLS modulator 81, respectively, to thereby generate a power amplifier supply voltage VPA for the power amplifier 71.

[0080] By including a DC path through the DC path filter 73 and a separate AC path through the modulator output filter 91, enhanced efficiency of the envelope tracking system 100 can be achieved. For example, low frequency current (including, but not limited to, DC current) can be provided through the DC path filter 73, thereby relaxing size and/or DC resistance constraints of the MLS modulator’s switches.

[0081] Accordingly, lower switching losses in the AC path can be achieved, thereby enhancing overall system efficiency. In one example, the DC path carries at least 75% of the energy provided by envelope tracking system 100 to the power amplifier 71.

[0082] Figure 3 A is a schematic diagram of another embodiment of an envelope tracking system 140 for a power amplifier 101. The envelope tracking system 140 includes an envelope tracking integrated circuit (IC) 102, a DC path filter 103, a modulator output filter 104 (which serves as an AC path filter, in this embodiment), DAC circuitry 105, an envelope filter 106, first to fourth decoupling capacitors 111-114, respectively, and an inductor 117.

[0083] Although one embodiment of an envelope tracking system is shown in Figure 3A, the teachings herein are applicable to envelope tracking systems implemented in a wide variety of ways. Accordingly, other implementations are possible.

[0084] In the illustrated embodiment, the envelope tracking IC 102 includes MLS switching circuitry 121, a digital control circuit 122, a baseband MLS modulator 123, and a modulator control circuit 124. The envelope tracking IC 102 of Figure 3A is depicted with various pins or pads for providing a variety of functions, such as receiving a battery voltage (VBATT), communicating over a serial peripheral interface (SPI), outputting a DC voltage VDC, receiving a differential analog envelope signal (ENV_p, ENV_n), connecting to the decoupling capacitors 111-114, and connecting to the inductor 117. An envelope tracking IC is also referred to herein in as an envelope tracking semiconductor die or chip.

[0085] The MLS switching circuitry 121 controls a current through the inductor 117 to provide voltage regulation. For example, the MLS switching circuitry 121 can include switches and a controller that turns on and off the switches using any suitable regulation scheme (including, but not limited to, pulse-width modulation) to provide DC- to-DC conversion. In the illustrated embodiment, the MLS switching circuitry 121 outputs four regulated MLS voltages of different voltage levels and a regulated DC voltage VDC. However, the MLS switching circuitry 121 can be implemented to output more or fewer regulated voltages.

[0086] As shown in Figure 3A, the MLS switching circuitry 121 is controlled by the digital control circuit 122. The digital control circuit 122 can provide programmability to the MLS switching circuitry 121 including, but not limited to, control over voltage levels of one or more regulated voltages outputted by the MLS switching circuitry 121. As shown in Figure 3A, the digital control circuit 122 is coupled to the SPI bus. In certain implementations, the digital control circuit 122 controls the MLS switching circuitry 121 based on data received over the SPI bus and/or other chip interface.

[0087] The baseband MLS modulator 123 includes an output coupled to the power amplifier supply voltage VPA through the modulator output filter 104. In certain implementations, the baseband MLS modulator 123 includes switches coupled between each of the regulated MLS voltages and the modulator output filter 104. Additionally, the modulator’s switches are selectively opened or closed by the modulator controller 124 based on the analog envelope signal.

[0088] In certain implementations, the modulator control circuit 124 includes a differential envelope amplifier for converting the differential analog envelope signal into a single-ended envelope signal, and two or more comparators that compare the single-ended analog envelope signal to different signal thresholds. Additionally, the modulator controller 124 controls the activation of the switches of the MLS modulator 123 based on the results of the comparisons.

[0089] In the illustrated embodiment, the DC path filter 103 includes a shunt capacitor 127 and a series inductor 128. Additionally, the modulator output filter 104 includes a first series inductor 131, a second series inductor 132, a first shunt capacitor 135, and a second shunt capacitor 136. Although example implementations of a DC path filter and a modulator output filter 104 are depicted in Figure 3 A, the teachings herein are applicable to filters implemented in a wide variety of ways. Accordingly, other implementations of filters can be used in accordance with the teachings herein.

[0090] In certain implementations, one or more components of a filter are controllable (for instance, digitally programmable and/or analog-tuned) to provide enhanced flexibility and/or configurability. For example, in the illustrated embodiment, the first shunt capacitor 135 and the second shunt capacitor 136 are controllable. Although two examples of controllable filter components are shown, other filter components can additionally or alternatively be implemented to be controllable.

[0091] Figure 3B is a schematic diagram of another embodiment of an envelope tracking system 150 for apower amplifier 101. The envelope tracking system 150 of Figure 3B is similar to the envelope tracking system 140 of Figure 3A, except that the envelope tracking system 150 includes a different implementation of a modulator output filter 144.

[0092] For example, in comparison to the modulator output filter 104 of Figure 3A, the modulator output filter 144 of Figure 3B further includes a DC blocking capacitor 138 for blocking low frequency current through the modulator output filter 144. In the illustrated embodiment, the DC blocking capacitor 138 is coupled to the output of the modulator output filter 144.

[0093] By including the DC blocking capacitor 138, lower switching losses in the AC path can be achieved, thereby enhancing overall system efficiency. For example, inclusion of the DC blocking capacitor 138 can aid in increasing a percentage of energy carried by the DC path through the DC path filter 103 relative to the energy carried by the AC path through the modulator output filter 144. In one example, the DC path through the DC path filter 103 carries at least 75% of the energy provided by envelope tracking system 150 to the power amplifier 101.

[0094] Figure 3C is a schematic diagram of another embodiment of an envelope tracking system 160 for apower amplifier 101. The envelope tracking system 160 of Figure 3C is similar to the envelope tracking system 150 of Figure 3B, except that the envelope tracking system 160 includes a different implementation of a modulator output filter 154.

[0095] For example, in comparison to the modulator output filter 144 of Figure 3B, the modulator output filter 154 of Figure 3C includes the DC blocking capacitor 138 coupled to the filter’s input. A DC blocking capacitor can be included in a modulator output filter in a wide variety of locations, including, for example, at the input, at the output, or along the signal path between the input and the output.

[0096] Figure 4 is a schematic diagram of another embodiment of an envelope tracking system 170 for a power amplifier. The envelope tracking system 170 includes an MLS DC-to-DC converter 72, a DC path filter 73, MLS modulators 81a, 81b, ... 81n, modulator output filters 91a, 91b, ... 91n. [0097] The envelope tracking system 170 of Figure 4 is similar to the envelope tracking system 100 of Figure 2, except that the envelope tracking system 170 includes a plurality of modulators and a plurality of modulator output filters that operate in parallel with one another to generate the power amplifier supply voltage based on the analog envelope signal and the regulated voltages.

[0098] Including multiple modulators can provide a finer resolution of quantization. For example, any number (0, 1 , 2, etc.) of the modulators can be activated at a given time to provide greater control over the power amplifier supply voltage.

[0099] Figure 5 is a schematic diagram of another embodiment of an envelope tracking system 180 for a power amplifier. The envelope tracking system 180 of Figure 5 includes an envelope tracking IC 172, a DC path filter 103, a first modulator output filter 144a, a second modulator output filter 144b, DAC circuitry 105, an envelope filter 106, first to fourth decoupling capacitors 111-114, respectively, and an inductor 117. The envelope tracking IC 172 includes MLS switching circuitry 121, a digital control circuit 122, a first baseband MLS modulator 123a, a second baseband MLS modulator 123b, and a modulator control circuit 124. Although an example with two baseband MLS modulators is shown, more or fewer baseband MLS modulators can be included.

[0100] The modulator control circuit 124 controls the MLS modulators 123a, 123b based on the differential analog envelope signal ENV_p, ENV_n. The modulator control circuit 124 can control whether or not either or both of the MLS modulators 123a, 123b are activated, as well as particular modulator switches that are opened or closed in each modulator. Including two or more MLS modulators can enhance quantization and provide greater control over generation of the power amplifier supply voltage VPA.

[0101] In certain implementations, the modulator control circuit 124 includes a differential envelope amplifier for converting the differential analog envelope signal into a single-ended envelope signal, and two or more comparators that compare the single-ended analog envelope signal to different signal thresholds. Additionally, the modulator controller 124 controls the activation of the switches of the MLS modulators 123a, 123b based on the results of the comparisons.

[0102] Figure 6A is a schematic diagram of one embodiment of a differential envelope amplifier 210 for an envelope tracking system. The differential envelope amplifier 210 includes an amplification circuit 201, a common mode feedback circuit 202, and a differential input filter 203. [0103] The differential envelope amplifier 210 of Figure 6A illustrates one embodiment of a differential envelope amplifier. In certain implementations, a differential envelope amplifier is included in an envelope tracking interface to convert a differential envelope signal to a single-ended envelope signal and/or to provide compensation for common mode error. For example, a differential envelope tracker can be included in a modulator’ s control circuit. Although one example of a differential envelope amplifier is shown, a differential envelope amplifier can be implemented in a wide variety of ways.

[0104] The differential input filter 203 receives a differential analog envelope signal ENV_p, ENV_n, and filters the differential analog envelope signal to generate a filtered differential analog envelope signal.

[0105] The amplification circuit 201 includes a first differential input that receives the filtered differential analog envelope signal from the differential input filter 203 and a second differential input that receives a differential compensation signal from the common mode feedback circuit 202. The amplification circuit 201 includes an output that generates a single-ended analog envelope signal ENV.

[0106] As shown in Figure 6A, the common mode feedback circuit 202 is connected between the output of the amplification circuit 201 and the second differential input of the amplification circuit 201. The common mode feedback circuit 202 provides single-ended to differential signal conversion, in this example.

[0107] The common mode feedback circuit 202 provides feedback that compensates the amplification circuit 201 for an error arising from a common mode voltage of the differential analog envelope signal ENV_p, ENV_n.

[0108] Figure 6B is a schematic diagram of one embodiment of a differential envelope amplifier 240 for an envelope tracking system. The differential envelope amplifier 240 includes an amplification circuit 211, a common mode feedback circuit 212, and a differential input filter 213.

[0109] The differential envelope amplifier 240 of Figure 6B is similar to the differential envelope amplifier 210 of Figure 6 A, except that the differential envelope amplifier 240 includes specific implementations of circuitry. Although one example of circuitry is shown, a differential envelope amplifier can be implemented in other ways.

[0110] In the illustrated embodiment, the amplification circuit 211 includes a first differential input, a second differential input, and an output. The first differential input is a voltage input associated with a first transconductance Gm_IN, and the second differential input is a voltage input associated with a second transconductance Gm_FBK. In certain implementations, the amount of transconductance of Gm_IN is greater than that of Gm_FBK.

[0111] With continuing reference to Figure 6B, the common mode feedback circuit 212 includes a first resistor 221 and a second resistor 222, which operate as a voltage divider that generates a divided voltage Vmv. The first resistor 221 and the second resistor 222 are connected in series between the output of the amplification circuit 211 and a reference voltage, such as ground. The common mode feedback circuit 212 includes a capacitor 224 in parallel with the first resistor 221. The common mode feedback circuit 212 further includes a third resistor 223 and a current source 225 connected in series between a supply voltage and ground. The second differential input of the amplification circuit 221 compares a voltage VR across the third resistor 223 to the divided voltage VDIV generated by the first and second resistor 221, 222. In certain implementations the current source 225 is controllable (for instance, variable and/or programmable) to control a common mode setting of the common mode feedback circuit 212.

[0112] The common mode feedback circuit 212 operates to provide feedback that controls an output DC bias point or level of the amplification circuit 211, thereby reducing or eliminating an impact of a common mode voltage of the differential analog envelope signal ENV_P, ENV_n.

[0113] In the illustrated embodiment, the differential input filter 213 includes a first filter resistor 231, a second filter resistor 232, and a filter capacitor 233. The differential input filter 213 provides low pass filtering to the differential analog envelope signal ENV_p, ENV_n, and provides the filtered differential analog envelope signal to the first differential input of the amplification circuit 211.

[0114] Figure 7 is a schematic diagram of one embodiment of an amplification circuit 400 for the differential envelope amplifiers of Figures 6 A and 6B. Although one example of a suitable amplification circuit is shown, a differential envelope amplifier can include amplification circuitry implemented in a wide variety of ways.

[0115] As shown in Figure 7, the differential amplification circuit 400 includes a first pair of p-type field effect transistors (PFETs) 301-302 for amplifying a first differential input IN _P , IN _n . The first pair of PFETs 301-302 is biased by a first pair of current sources 321-322 (each providing a current IBIAS, in this example), and includes a first resistor 331 of resistance R for coupling the source of the PFET 301 to the source of the PFET 302. The differential amplification circuit 400 further includes a second pair of PFETs 303-304 for amplifying a second differential input ViNp_fd, ViNn_fd, corresponding to a differential common mode compensation signal. The second pair of PFETs 303-304 is biased by a second pair of current sources 323-324 (also providing a current IBIAS, in this example), and includes a second resistor 332 (also of resistance R, in this example) for coupling the source of the PFET 303 to the source of the PFET 304.

[0116] Currents from the first pair of PFETs 301-302 and the second pair of PFETs 303-304 are combined using folded cascode circuitry that includes current sources 325-326, cascode n-type field effect transistors (NFETs) 311-312, and load PFETs 313- 314. In this example, the gates of the cascode NFETs 311-312 are controlled by a bias voltage VBIAS-

[0117] The amplification circuit 400 further includes a push-pull output stage including output NFET 317, output PFET 318, a current source 327, and a class AB bias circuit 328. As shown in Figure 7, the current source 327 provides a current IBIAS_AB to the class AB bias circuit 328, which biases the output NFET 317 and output PFET 318 to provide enhanced bandwidth.

[0118] Figure 8 is a graph of one example of differential analog envelope signal voltage versus time. As shown in Figure 8, a non-inverted envelope signal ENV_p and an inverted envelope signal ENV_n operate as a differential analog envelope. By using differential signaling, common mode noise (V_cm) can be rejected.

[0119] In one example, the differential analog envelope signal corresponds to MIP eTrak envelope signal, such as a 1.2V differential envelope signal with 1.5V peak-to- peak maximum input swing or a 1.8V differential envelope signal with 2V peak-to-peak maximum input swing.

[0120] Figure 9 is a schematic diagram of one embodiment of comparator circuitry 610 for an MFS modulator. The comparator circuitry 610 includes comparators 601a, 601b, ... 601m, resistors 603a, 603b, ... 603m, and controllable current sources 602a, 602b, ... 602m.

[0121] Although an example with three comparators and corresponding circuitry is shown, more or fewer comparators can be included as indicated by the ellipses. Furthermore, although one implementation of comparator circuitry for an MFS modulator is shown, other implementations of comparator circuitry can be used in accordance with the teachings herein. [0122] The comparator circuitry 610 receives a single-ended analog envelope signal ENV (for instance, from a differential envelope amplifier, including, but not limited to, the differential envelope amplifier 210 of Figure 6 A or the differential envelope amplifier 240 of Figure 6B), and generates comparator output signals Lvla, Lvlb, ... Lvlm.

[0123] The comparator output signals Lvla, Lvlb, ... Lvlm are generated based on comparing the single-ended envelope signal ENV to different signal thresholds. For example, although the comparators 601a, 601b, ... 601m each receive a common reference voltage Vref, separate thresholds are controlled for the comparators 601a, 601b, ... 601m by the controllable current sources 602a, 602b, ... 602m, respectively. For example, the magnitudes of the currents from the controllable current sources 602a, 602b, ... 602m controls a voltage drop across the resistors 603a, 603b, ... 603m, respectively, and a corresponding signal threshold used for comparison.

[0124] In the illustrated embodiment, n-bit digital control signals LKa<l:n>, LKb<l:n>, ..., LKm<l:n> are used to control the levels of the signal thresholds of the comparators 601a, 601b, ... 601m, respectively. In certain implementations, the digital control signals are controlled based on data received over an interface, for instance, an SPI bus. Although one example of signal threshold control is shown, the teachings herein are applicable to signal threshold control implemented in other ways.

[0125] In certain implementations, the comparator output signals Lvla, Lvlb, ... Lvlm are used to control selective activation of individual switches of a modulator and/or a number of active modulators in multi-modulator implementations.

[0126] Figure 10 is a schematic diagram of embodiment of a comparator 720 for the comparator circuitry 610 of Figure 9. Although one example of a suitable comparator is shown, an MLS modulator can include comparators implemented in a wide variety of ways.

[0127] The comparator 720 includes a pair of input NFETs 701a-701b, a pair of bias NFETs 702a-702b, a first pair of load PFETs 703a-703b, a second pair of load PFETs 704a-704b, a first pair of current source PFETs 705a-705b, a first pair of mirror NFETs 706a-706b, a second pair of current source PFETs 707a-707b, a second pair of mirror NFETs 708a-708b, a pair of current source NFETs 710a-710b, a third pair of load PFETs 709a-709b, a pair of output PFETs 71 la-71 lb, and a pair of output NFETs 712a- 712b. In certain implementations, the bias NFET 702b is scaled in size (for instance, of larger device width) than the bias NFET 702a, but implemented with a matched transistor layout.

[0128] In the illustrated embodiment, the comparator 720 receives an input voltage Vin and a reference voltage Vref, and outputs a differential comparison signal OUT+, OUT- indicating a result of the comparison. The comparator 720 is biased by a current IBIAS, and receives a power supply voltage VDD and ground voltage GND. Although the comparison signal is implemented differentially in this example, either of the signal components of the differential comparison signal OUT+, OUT- can be used as a single-ended comparison signal.

[0129] Figure 11 is a schematic diagram of a mobile device 800 according to another embodiment. The mobile device 800 includes a baseband system 801, a transceiver 802, a front end system 803, antennas 804, a power management system 805, a memory 806, a user interface 807, and a battery 808.

[0130] The mobile device 800 can be used communicate using a wide variety of communications technologies, including, but not limited to, 2G, 3G, 4G (including LTE, LTE-Advanced, and LTE-Advanced Pro), 5G, WLAN (for instance, Wi-Fi), WPAN (for instance, Bluetooth and ZigBee), WMAN (for instance, WiMax), and/or GPS technologies.

[0131] The transceiver 802 generates RF signals for transmission and processes incoming RF signals received from the antennas 804. It will be understood that various functionalities associated with the transmission and receiving of RF signals can be achieved by one or more components that are collectively represented in Figure 11 as the transceiver 802. In one example, separate components (for instance, separate circuits or dies) can be provided for handling certain types of RF signals.

[0132] The front end system 803 aids is conditioning signals transmitted to and/or received from the antennas 804. In the illustrated embodiment, the front end system 803 includes power amplifiers (PAs) 811, low noise amplifiers (LNAs) 812, filters 813, switches 814, and duplexers 815. However, other implementations are possible.

[0133] For example, the front end system 803 can provide a number of functionalizes, including, but not limited to, amplifying signals for transmission, amplifying received signals, filtering signals, switching between different bands, switching between different power modes, switching between transmission and receiving modes, duplexing of signals, multiplexing of signals (for instance, diplexing or triplexing), or some combination thereof. [0134] In certain implementations, the mobile device 800 supports carrier aggregation, thereby providing flexibility to increase peak data rates. Carrier aggregation can be used for both Frequency Division Duplexing (FDD) and Time Division Duplexing (TDD), and may be used to aggregate a plurality of carriers or channels. Carrier aggregation includes contiguous aggregation, in which contiguous carriers within the same operating frequency band are aggregated. Carrier aggregation can also be non-contiguous, and can include carriers separated in frequency within a common band or in different bands.

[0135] The antennas 804 can include antennas used for a wide variety of types of communications. For example, the antennas 804 can include antennas associated transmitting and/or receiving signals associated with a wide variety of frequencies and communications standards.

[0136] In certain implementations, the antennas 804 support MIMO communications and/or switched diversity communications. For example, MIMO communications use multiple antennas for communicating multiple data streams over a single radio frequency channel. MIMO communications benefit from higher signal to noise ratio, improved coding, and/or reduced signal interference due to spatial multiplexing differences of the radio environment. Switched diversity refers to communications in which a particular antenna is selected for operation at a particular time. For example, a switch can be used to select a particular antenna from a group of antennas based on a variety of factors, such as an observed bit error rate and/or a signal strength indicator.

[0137] The mobile device 800 can operate with beamforming in certain implementations. For example, the front end system 803 can include phase shifters having variable phase controlled by the transceiver 802. Additionally, the phase shifters are controlled to provide beam formation and directivity for transmission and/or reception of signals using the antennas 804. For example, in the context of signal transmission, the phases of the transmit signals provided to the antennas 804 are controlled such that radiated signals from the antennas 804 combine using constructive and destructive interference to generate an aggregate transmit signal exhibiting beam-like qualities with more signal strength propagating in a given direction. In the context of signal reception, the phases are controlled such that more signal energy is received when the signal is arriving to the antennas 804 from a particular direction. In certain implementations, the antennas 804 include one or more arrays of antenna elements to enhance beamforming. [0138] The baseband system 801 is coupled to the user interface 807 to facilitate processing of various user input and output (I/O), such as voice and data. The baseband system 801 provides the transceiver 802 with digital representations of transmit signals, which the transceiver 802 processes to generate RF signals for transmission. The baseband system 801 also processes digital representations of received signals provided by the transceiver 802. As shown in Figure 11 , the baseband system 801 is coupled to the memory 806 of facilitate operation of the mobile device 800.

[0139] The memory 806 can be used for a wide variety of purposes, such as storing data and/or instructions to facilitate the operation of the mobile device 800 and/or to provide storage of user information.

[0140] The power management system 805 provides a number of power management functions of the mobile device 800. The power management system 805 can include an MLS envelope tracker 860 implemented in accordance with one or more features of the present disclosure.

[0141] As shown in Figure 11, the power management system 805 receives a battery voltage form the battery 808. The battery 808 can be any suitable battery for use in the mobile device 800, including, for example, a lithium-ion battery.

[0142] Figure 12 is a schematic diagram of one embodiment of a communication system 950 for transmitting RF signals. The communication system 950 includes a battery 901, an MLS envelope tracker 902, a power amplifier 903, a directional coupler 904, a duplexing and switching circuit 905, an antenna 906, a baseband processor 907, a signal delay circuit 908, a digital pre-distortion (DPD) circuit 909, an I/Q modulator 910, an observation receiver 911, an intermodulation detection circuit 912, an envelope delay circuit 921, a coordinate rotation digital computation (CORDIC) circuit 922, a shaping circuit 923, a digital-to-analog converter 924, and a reconstruction filter 925.

[0143] The communication system 950 of Figure 12 illustrates one example of an RF system that can include an envelope tracking system implemented in accordance with one or more features of the present disclosure. However, the teachings herein are applicable to RF systems implemented in a wide variety of ways.

[0144] The baseband processor 907 operates to generate an in-phase (I) signal and a quadrature-phase (Q) signal, which correspond to signal components of a sinusoidal wave or signal of a desired amplitude, frequency, and phase. For example, the I signal and the Q signal provide an equivalent representation of the sinusoidal wave. In certain implementations, the I and Q signals are outputted in a digital format. The baseband processor 907 can be any suitable processor for processing baseband signals. For instance, the baseband processor 907 can include a digital signal processor, a microprocessor, a programmable core, or any combination thereof.

[0145] The signal delay circuit 908 provides adjustable delay to the I and Q signals to aid in controlling relative alignment between the differential analog envelope signal ENV_p, ENV_n provided to the MLS envelope tracker 902 and the RF signal RFIN provided to the power amplifier 903. The amount of delay provided by the signal delay circuit 908 is controlled based on amount of intermodulation in adjacent bands detected by the intermodulation detection circuit 912.

[0146] The DPD circuit 909 operates to provide digital shaping to the delayed I and Q signals from the signal delay circuit 908 to generate digitally pre-distorted I and Q signals. In the illustrated embodiment, the DPD provided by the DPD circuit 909 is controlled based on amount of intermodulation detected by the intermodulation detection circuit 912. The DPD circuit 909 serves to reduce a distortion of the power amplifier 903 and/or to increase the efficiency of the power amplifier 903.

[0147] The I/Q modulator 910 receives the digitally pre-distorted I and Q signals, which are processed to generate the RF signal RFIN. For example, the I/Q modulator 910 can include DACs configured to convert the digitally pre-distorted I and Q signals into an analog format, mixers for upconverting the analog I and Q signals to radio frequency, and a signal combiner for combining the upconverted I and Q signals into the RF signal RFIN. In certain implementations, the I/Q modulator 910 can include one or more filters configured to filter frequency content of signals processed therein.

[0148] The envelope delay circuit 921 delays the I and Q signals from the baseband processor 907. Additionally, the CORDIC circuit 922 processes the delayed I and Q signals to generate a digital envelope signal representing an envelope of the RF signal RFIN. Although Figure 12 illustrates an implementation using the CORDIC circuit 922, an analog envelope signal can be obtained in other ways.

[0149] The shaping circuit 923 operates to shape the digital envelope signal to enhance the performance of the communication system 950. In certain implementations, the shaping circuit 923 includes a shaping table that maps each level of the digital envelope signal to a corresponding shaped envelope signal level. Envelope shaping can aid in controlling linearity, distortion, and/or efficiency of the power amplifier 903.

[0150] In the illustrated embodiment, the shaped envelope signal is a digital signal that is converted by the DAC 924 to a differential analog envelope signal. Additionally, the differential analog envelope signal is filtered by the reconstruction filter 925 to generate a differential analog envelope signal ENV_p, ENV_n suitable for use by a differential envelope amplifier of the MLS envelope tracker 902. In certain implementations, the reconstruction filter 925 includes a differential low pass filter.

[0151] With continuing reference to Figure 12, the MLS envelope tracker 902 receives the differential analog envelope signal from the reconstruction filter 925 and a battery voltage VBATT from the battery 901, and uses the differential analog envelope signal ENV_p, ENV_n to generate a power amplifier supply voltage VCC_PA for the power amplifier 903 that changes in relation to the envelope of the RF signal RFIN. The power amplifier 903 receives the RF signal RFIN from the I/Q modulator 910, and provides an amplified RF signal RFOUT to the antenna 906 through the duplexing and switching circuit 905, in this example.

[0152] The directional coupler 904 is positioned between the output of the power amplifier 903 and the input of the duplexing and switching circuit 905, thereby allowing a measurement of output power of the power amplifier 903 that does not include insertion loss of the duplexing and switching circuit 905. The sensed output signal from the directional coupler 904 is provided to the observation receiver 911, which can include mixers for providing down conversion to generate downconverted I and Q signals, and DACs for generating I and Q observation signals from the downconverted I and Q signals.

[0153] The intermodulation detection circuit 912 determines an intermodulation product between the I and Q observation signals and the I and Q signals from the baseband processor 907. Additionally, the intermodulation detection circuit 912 controls the DPD provided by the DPD circuit 909 and/or a delay of the signal delay circuit 908 to control relative alignment between the differential analog envelope signal ENV_p, ENV_n and the RF signal RFIN. In another embodiment, the intermodulation detection circuit 912 additionally or alternatively controls a delay of the signal delay circuit 921.

[0154] By including a feedback path from the output of the power amplifier 903 and baseband, the I and Q signals can be dynamically adjusted to optimize the operation of the communication system 950. For example, configuring the communication system 950 in this manner can aid in providing power control, compensating for transmitter impairments, and/or in performing DPD.

[0155] Although illustrated as a single stage, the power amplifier 903 can include one or more stages. Furthermore, the teachings herein are applicable to communication systems including multiple power amplifiers.

[0156] Figure 13 is a schematic diagram of an MLS modulation system according to one embodiment. The MLS modulation system 1050 includes a modulator control circuit 1020, an MLS DC-to-DC converter 1025, a modulator switch bank 1027, and a decoupling capacitor bank 1030.

[0157] The MLS modulation system 1050 of Figure 13 illustrates one implementation of MLS modulator circuitry suitable for incorporation in a multi-level envelope tracker. However, other implementations of MLS modulator circuitry can be included in multi-level envelope trackers implemented in accordance with the teachings herein.

[0158] The MLS DC-to-DC converter 1025 generates a first regulated voltage VMLSI, a second regulated voltage VMLS2, and a third regulated voltage VMLS3 based on providing DC-to-DC conversion of a battery voltage VBATT. Although an example with three regulated voltages is shown, the MLS DC-to-DC converter 1025 can generate more or fewer regulated voltages. In certain implementations, at least a portion of the regulated voltages are boosted relative to the battery voltage VBATT. Additionally or alternatively, one or more of the regulated voltages is a buck voltage having a voltage lower than the battery voltage VBATT.

[0159] The decoupling capacitor bank 1030 aids in stabilizing the regulated voltages generated by the MLS DC-to-DC converter 1025. For example, the decoupling capacitor bank 1030 of Figure 13 includes a first decoupling capacitor 1031 for decoupling the first regulated voltage VMLSI , a second decoupling capacitor 1032 for decoupling the second regulated voltage VMLS2, and a third decoupling capacitor 1033 for decoupling the third regulated voltage VMLS3.

[0160] With continuing reference to Figure 13, the modulator switch bank 1027 includes a first switch 1041 connected between the modulator’s output (MOD _OUT ) and the first regulated voltage VMLSI , a second switch 1042 connected between the modulator’s output and the second regulated voltage VMLS2, and a third switch 1043 connected between the modulator’s output and the third regulated voltage VMLS3. The modulator control 1020 operates to selectively open or close the switches 1041-1043 to thereby control modulator’s output.

[0161] Figure 14 is a schematic diagram of an MLS DC-to-DC converter 1073 according to one embodiment. The MLS DC-to-DC converter 1073 includes an inductor 1075, a first switch Si, a second switch S2, a third switch S3, a fourth switch S4, a fifth switch S5, and a sixth switch S6. The MLS DC-to-DC converter 1073 further includes control circuitry (not shown in Figure 14) for opening and closing the switches to provide regulation.

[0162] The MLS DC-to-DC converter 1073 of Figure 14 illustrates one implementation of an MLS DC-to-DC converter suitable for incorporation in a multi-level envelope tracker. However, other implementations of MLS DC-to-DC converters can be included in multi-level envelope trackers implemented in accordance with the teachings herein.

[0163] In the illustrated embodiment, the first switch Si includes a first end electrically connected to the battery voltage VBATT and a second end electrically connected to a first end of the second switch S ₂ and to a first end of the inductor 1075. The second switch S ₂ further includes a second end electrically connected to a first or ground supply VGND- Although Figure 14 illustrates a configuration of a DC-to-DC converter that is powered using a ground supply and a battery voltage, the teachings herein are applicable to DC-to-DC converters powered using any suitable power supplies. The inductor 1075 further includes a second end electrically connected to a first end of each of the third to sixth switches S ₃ -S ₆ . The third switch S ₃ further includes a second end electrically connected to the ground supply VGND. The fourth, fifth, and sixth switches S4-S6 each include a second end configured to generate the first, second, and third regulated voltages VMLSI, VMLS2, and V _M LS3, respectively.

[0164] The first to sixth switches S1-S6 are selectively opened or closed to maintain regulated voltages within a particular error tolerance of target voltage levels. Although an example with three regulated voltages is shown, the MLS DC-to-DC converter 1073 can be implemented to generate more or fewer regulated voltages.

[0165] In the illustrated embodiment, the MLS DC-to-DC converter 1073 operates as a buck-boost converter operable to generate regulated boost voltages greater than the battery voltage VBATT and/or regulated buck voltages lower than the battery voltage VBATT- However, other implementations are possible.

[0166] Figure 15 is a schematic diagram of one example of timing for MLS DC- to-DC conversion. As shown in Figure 15, the width of regulation cycles can be used to control the voltage level of the regulated voltages generated by MLS DC-to-DC conversion. For instance, one MLS regulated voltage can be associated with a period tl, while a second regulation voltage can be associated with a different period t2. Additionally, a non-overlap period tovlp can be used to avoid crowbar currents between different voltage levels.

[0167] In certain implementations herein, one or more regulation periods (for instance, tl and/or t2) and/or one or more non-overlap period (for instance, tovlop) are digitally controllable. In certain implementations, the delays are controlled based on a digital state machine and/or other suitable circuitry.

[0168] The regulated voltages generated by MLS DC-to-DC conversion can be selectively provided by a modulator to a modulator output filter. In the illustrated example, the modulator output filter is depicted as including shunt capacitors Cl and C2 and series inductors LI and L2. However, other implementations of modulator output filters are possible.

[0169] Figure 16 is a schematic diagram of one example of MLS envelope tracking for a continuous wave signal. The example shown is for a continuous wave signal having a frequency of about 100 MHz and a corresponding period of about 10ns. Examples of suitable MLS voltage levels for the signal are shown.

Conclusion

[0170] Some of the embodiments described above have provided examples in connection with mobile devices. However, the principles and advantages of the embodiments can be used for any other systems or apparatus that have needs for envelope tracking.

[0171] Unless the context clearly requires otherwise, throughout the description and the claims, the words “comprise,” “comprising,” and the like are to be construed in an inclusive sense, as opposed to an exclusive or exhaustive sense; that is to say, in the sense of “including, but not limited to.” The word “coupled”, as generally used herein, refers to two or more elements that may be either directly connected, or connected by way of one or more intermediate elements. Likewise, the word “connected”, as generally used herein, refers to two or more elements that may be either directly connected, or connected by way of one or more intermediate elements. Additionally, the words “herein,” “above,” “below,” and words of similar import, when used in this application, shall refer to this application as a whole and not to any particular portions of this application. Where the context permits, words in the above Detailed Description using the singular or plural number may also include the plural or singular number respectively. The word “or” in reference to a list of two or more items, that word covers all of the following interpretations of the word: any of the items in the list, all of the items in the list, and any combination of the items in the list.

[0172] Moreover, conditional language used herein, such as, among others, "can," "could," "might," "can," “e.g.,” “for example,” “such as” and the like, unless specifically stated otherwise, or otherwise understood within the context as used, is generally intended to convey that certain embodiments include, while other embodiments do not include, certain features, elements and/or states. Thus, such conditional language is not generally intended to imply that features, elements and/or states are in any way required for one or more embodiments or that one or more embodiments necessarily include logic for deciding, with or without author input or prompting, whether these features, elements and/or states are included or are to be performed in any particular embodiment.

[0173] The above detailed description of embodiments of the invention is not intended to be exhaustive or to limit the invention to the precise form disclosed above. While specific embodiments of, and examples for, the invention are described above for illustrative purposes, various equivalent modifications are possible within the scope of the invention, as those skilled in the relevant art will recognize. For example, while processes or blocks are presented in a given order, alternative embodiments may perform routines having steps, or employ systems having blocks, in a different order, and some processes or blocks may be deleted, moved, added, subdivided, combined, and/or modified. Each of these processes or blocks may be implemented in a variety of different ways. Also, while processes or blocks are at times shown as being performed in series, these processes or blocks may instead be performed in parallel, or may be performed at different times.

[0174] The teachings of the invention provided herein can be applied to other systems, not necessarily the system described above. The elements and acts of the various embodiments described above can be combined to provide further embodiments.

[0175] While certain embodiments of the inventions have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the disclosure. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the disclosure. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the disclosure.