AND COUPLED INDUCTORS

CROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority to U.S. Provisional Application serial no. 62/861,922 filed on June 14, 2019 and entitled MULTI-LEVEL VOLTAGE SOURCE

PARALLEL INVERTERS AND COUPLED INDUCTORS, which is hereby incorporated by reference in its entirety.

FIELD OF THE INVENTION

[0002] The present invention relates to power inverters (i.e., electronic devices and/or circuitry for converting direct current (DC) to alternating current (AC)), and to pulse width modulation (PWM) schemes for producing modulated electronic waveforms.

BACKGROUND OF THE INVENTION

[0003] Power inverters (also referred to simply as inverters, or as converters) are electronic devices and/or circuits for converting direct current (DC) to alternating current (AC) for a variety of industrial applications, such as speed controllers (variable-frequency drives) for electric motors, solar or wind power generation systems, electrical charging and supply systems, and power-grid transmission inverters. Pulse width modulation (PWM) involves switching the power supply to an electronic circuit at a controlled frequency to produce a desired average voltage. A power inverter may be operated in accordance with a PWM control scheme to produce a voltage waveform consisting of numerous pulses. An inductor may be connected to the power inverter to fdter the waveform so that it has a series of discrete voltage levels, which collectively approximate a sine wave.

[0004] Parallel connected inverters can be used to share current in high power 3 -phase applications and provide a modular solution for producing multilevel output voltage waveforms. Multilevel pulse width modulated (PWM) output voltage waveforms, with PWM frequencies higher than the inverter switching frequency, can be used to reduce cable and motor interaction issues as well as to reduce the size of full sinewave 3 -phase AC fdters (see reference [1]). Many different multilevel converter topologies have been proposed, such as neutral point clamped, flying capacitor, stacked multicell, and coupled inductor inverters (see references [2] -[4]).

[0005] Various PWM techniques have been discussed for multilevel converters, namely sinusoidal PWM (SPWM), selective harmonic elimination (SHE), space-vector PWM (SVPWM), phase disposition (PD) and carrier interleaving techniques (see reference [5]). Parallel connected inverters can produce common mode (CM) circulating currents when using a common DC link (see reference [6]). PWM using carrier interleaving techniques using multiple phase shifted carriers can be used to lower the high frequency output current ripple by using current ripple cancellation (see references [7] and [8]). Carrier interleaving has the further advantage of reducing the size of AC passive components such as series fdter inductors in applications such as aerospace, electric vehicles, electrical AC grids, uninterruptible power systems and motor drives (see references [9] and [10]).

[0006] Various solutions have been studied to reduce circulating currents between parallel connected inverters. An isolation transformer has been described (see reference

[11]). A common mode choke can be used on the DC side of the converters (see reference

[12]). Both of these are effective in reducing the circulating currents, but increase the size and cost of the system. Coupled inductors have been described to prevent common mode circulating currents (see references [13]-[21]). Three phase coupled inductors have been used in each phase of a 3-phase system (see reference [13]). Intercell transformers have been used in place of multi limb coupled inductors to produce a modular system that can use a wide range of inverter legs connected in parallel (see reference [14]). Coupled inductor inverters (CII) can produce multi-level PWM voltage waveforms with a very low series inductance at its output terminals and that is related to the leakage inductance of two windings on the same core or the same limb of a multi limb inductor (see reference [1]). Generally, coupled inductor topologies in AC systems produce low-frequency fundamental output currents without producing fundamental flux in the magnetic core. The size of the cores can be reduced as a result with their size being directly related to the high- frequency switch mode voltages imposed across the inductor windings and the associated high frequency magnetic flux in the core. This contrasts with series AC fdter inductors where the core size can be determined by the low frequency peak flux in the core and its saturation flux. AC fdter inductors placed at inverter output terminals can be reduced in size whilst also using multi-level voltages with high-frequency PWM voltages several times higher than the inverter switching frequency. This, in turn, can have many benefits such as lowering losses in high-speed machines, lowering motor winding voltage stresses and reducing cable interaction. High-speed machines and flywheel energy storage devices naturally have a low inductance and inverters producing multi-level voltages with high PWM frequencies can be useful in lowering the machine harmonic losses.

[0007] Multi-module converters have been the subject of study over the years (see references [17]-[21]), with an emphasis on interleaved current ripple cancellation (see references [22]-[24]). Control schemes have addressed the issue of zero-sequence current (see reference [25]). The nature of the PWM scheme plays a significant role when selecting the size of output filters. PWM waveforms with finer alignment of switching edges can be produced by interleaving their switching. Parallel connected inverter legs using interleaved PWM switching can lower losses by introducing a large impedance in the path of circulating currents (see references [10] and [15]). A phase disposition scheme has been described (see reference [26]). This carrier-based scheme uses zero sequence or common mode voltages that are not represented in the line voltage. A discontinuous PWM scheme was introduced for use with a 3-limb coupled inductor (see reference [1]). The common mode voltage drop across the 3-phase inductor is reduced to zero. The inductor high frequency core and Cu losses are reduced as a result, but at the expense of using higher device switching frequencies. A space vector modulation-based PD scheme has been implemented which looks for the nearest voltage switching vector to control the differential currents (see reference [27]). However, it involves complex vector calculation and becomes more computational intensive when more than two parallel inverters are used such as massively parallel systems for high power applications. Reference [28] introduced modified PWM schemes which reduce, but not eliminate, circulating currents by modifying the switching time sequence in every switching sector. A two core coupled inductor system has been introduced in (see reference [29]) which reduces the differential mode circulating current (DMCC) and common mode circulating current (CMCC) separately.

[0008] A coupled inductor inverter (CII) can be used with a 3 -limb magnetic core in a variety of 3-phase applications (see references [15], and [30]). As shown in Fig. 1, phase windings can be placed on separate limbs of a 3-limb core using a reduced switch count inverter. The inductor windings experience naturally fluctuating DC current offsets, PWM dead-times are not required and the topology has a low series output impedance. The latter is related to the low flux leakage between two windings in each phase as they are located on the same inductor limb. However, the direct voltage excitation of the two windings restricts the inverter switching patterns and high-quality output voltage PWM waveforms are not possible. As shown in Fig. 2, a 3-limb core can be used in each phase of a 3-phase system, and the Y-connection of the 3 windings alleviates restrictions on the PWM switching patterns. However, the topology suffers from a high series output impedance due to the weak coupling between windings located on separate limbs. As shown in Figs. 3 and 4, this results in a significant fundamental voltage drop across this series impedance, which also restricts this topology from being used with high fundamental output frequencies.

SUMMARY OF THE INVENTION

[0009] In one aspect, the present invention comprises a power inverter for converting a DC voltage from a DC voltage source to AC voltage for a load. The power inverter comprises: an inverter input terminal for connection to the DC voltage source; and an inverter output terminal for connection to the load. The power inverter comprises at least two inverter legs in parallel connection with the inverter input terminal. Each inverter leg comprises: a pair of switches in series connection; for each of the switches, a diode in anti parallel connection to the switch; and an inverter leg output terminal in series connection with and between the pair of switches. The power inverter comprises a coupled inductor assembly including: at least one magnetic core; and for each one of the inverter legs, an associated pair of windings around the at least one magnetic core. The associated pair of windings comprises: a first winding in series connection with the inverter leg output terminal of the one of the inverter legs; and a second winding in "series opposing type connection" with the first winding, and in series connection with the inverter output terminal; the second winding is in series between the first winding and the inverter output terminal. The at least one magnetic core may comprise a single magnetic core comprising spatially separated limbs; for each of the inverter legs, the first winding and the second winding are wound around different ones of the spatially separated limbs. Alternatively, the at least one magnetic core may comprise a plurality of spatially separated magnetic cores; for each of the inverter legs, the first winding and the second winding are wound around different ones of the spatially separated magnetic cores. In either case, at least one winding associated with one of the inverter legs, and at least one winding associated with a different one of the inverter legs are "differentially coupled" by one of the at least one magnetic core, in respect to current flow through the windings in the direction towards the inverter output terminal.

[0010] In embodiments of the power inverter, the at least two inverter legs may consist of two inverter legs, three inverter legs, or four inverter legs.

[0011] In any of the foregoing embodiments of the power inverter, the at least one magnetic core may comprise the single magnetic core comprising the spatially separated limbs; and for each of the inverter legs, the first winding and the second winding are wound around different ones of the spatially separated limbs. Alternatively, in any of the foregoing embodiments of the power inverter, the at least one magnetic core may comprise a plurality of spatially separated magnetic cores; and for each of the inverter legs, the first winding and the second winding are wound around different ones of the spatially separated magnetic cores.

[0012] In any of the foregoing embodiments of the power inverter, the at least one magnetic core has a form that defines a closed loop. The closed loop may be either rectangular in shape, or toroidal in shape.

[0013] In one embodiment of the foregoing power inverter: the at least two inverter legs comprises first, second, and third inverter legs; the single magnetic core comprises the spatially separated limbs comprising first, second, and third limbs; and the pairs of windings comprise first, second and third pairs of windings. The first winding of the first pair of windings and the second winding of the second pair of windings are wound around the first limb and "differentially coupled" by the first limb in respect to current flow through the windings in the direction towards the inverter output terminal. The first winding of the second pair of windings and the second winding of the third pair of windings are wound around the second limb and "differentially coupled" by the second limb in respect to current flow through the windings in the direction towards the inverter output terminal. The first winding of the third pair of windings and the second winding of the first pair of windings are wound around the third limb and "differentially coupled" by the third limb in respect to current flow through the windings in the direction towards the inverter output terminal.

[0014] In one embodiment of the foregoing power inverter: the at least two inverter legs comprises first, second, and third inverter legs; spatially separate first, second, and third magnetic cores; the at least one magnetic core comprises the plurality of spatially separate magnetic cores comprising first, second, and third magnetic cores; and the pairs of windings comprise first, second, and third pairs of windings. The first winding of the first pair of windings and the second winding of the third pair of windings are wound around the first magnetic core and "differentially coupled" by the first magnetic core, in respect to current flow through the windings in the direction towards the inverter output terminal. The first winding of the second pair of windings and the first winding of the third pair of windings are wound around the second magnetic core and "differentially coupled" by the second magnetic core, in respect to current flow through the windings in the direction towards the inverter output terminal. The second winding of the first pair of windings and the second winding of the second pair of windings are wound around the third magnetic core and "differentially coupled" by the magnetic core, in respect to current flow through the windings in the direction towards the inverter output terminal.

[0015] Without limiting the present invention, the at least one magnetic core and the windings may be configured to create a large magnetizing inductance between the inverter leg output terminals and a low series inductance at the inverter output terminal. The configuration of the power inverter may be used to the following effects: (1) to produce a multilevel output voltage with a PWM frequency higher than the inverter switching frequency, and output voltage steps less than the DC voltage source; (2) to produce high effective inductance between the inverter leg output terminals that lowers the high frequency current ripple in the inductor windings; (3) to produce a low effective inductance at the inverter output terminal so that high quality, flat, PWM voltage steps are produced; and (4) the high inductance between the inverter leg out terminals and low series output inductance keeps balanced current sharing between the inverter leg output terminals.

[0016] The inverter of the present invention may be used to produce high quality multi level output voltages with a low series output inductance. The effective inverter series output impedance is designed to be very small and is determined by the low leakage inductance between windings located on the same limb, or individual cores, rather than the larger inter-limb leakage inductance in multi-limb magnetic cores. High quality multi level phase and line voltages may be produced with a very low fundamental voltage drop across the series output impedance in each phase. This makes the inverter suitable for delivering a higher fundamental voltage to the load or electrical AC grid voltage at high frequencies. This is more critical when generating very high fundamental frequencies above 400 Hz and above in the kHz range. CII topologies are validated for 3-phase systems using 3 and 4 inverter legs connected in parallel per phase. The line voltage PWM frequency produced may be 6 and 8 times the inverter switching frequency respectively. A multi-limb inductor can be used. This may be useful for 3-phase systems using 3 inverter legs and a standard 3 limb inductor per phase. Alternatively, a two-winding inductor with one core per inverter leg can be used. This may be useful for a modular inverter design where the number of inverter legs per phase can be increased to 4 or beyond. Negligible fundamental flux may be produced in the coupled inductor cores. The inductor winding voltage drops, and hence magnetic flux, have a frequency equal to the inverter switching frequency. Relatively balanced fundamental currents are produced in the parallel paths in each phase, but DC offset currents can be produced due to variations in device switching edges and on-state voltage drops. CII topologies using 3 inverter legs per phase produce 7 level PWM line voltages. CII topologies using 4 inverter legs per phase produce 9-level line voltages. The proposed topology is validated using simulation and experimental results.

[0017] The multi-level inverter topology of the present invention may permit high quality multi-level output voltages with a low series output impedance. This is achieved by a combination of carrier/reference signal manipulation and using specific coupled inductor connections. Since the inverter's output impedance can be designed to be very small, a small fundamental voltage drop is experienced across the coupled inductors and high quality multi-level output voltages can be experienced in the phase and line voltages. These features may make the topology suitable for generating high frequency fundamental voltages without experiencing excessive magnetic core losses or large fundamental voltage drops. [0018] The inverter of the present invention may be implemented using modular design and a variety of commercially available "off-the-shelf magnetic cores with high magnetic flux saturation, e.g. 1.2 to 1.5 Tesla. Modularity and standard components may reduce the topology cost factor. This, with a reduced size and weight, may make the technology suitable for a wide variety of applications such as aerospace and electric vehicle industry.

[0019] The present invention may be useful for inductive loads like motors and high speed generators/machines as the fdter inductors can be made very small in size. The present invention may also be useful for converting DC voltage produced by a renewable energy source (e.g., solar or wind power) to AC voltage for an AC power grid. Compared to some existing multi-level voltage topologies such as the NPC that uses a split DC rail, multi-level output voltages are obtained using a single DC rail, and the PWM frequency is much higher than the device switching frequency. Some CII topologies may remove the need for dead times, resulting in higher fundamental voltages being delivered to loads that use high fundamental frequencies.

BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In the drawings, which form part of the specification, like elements may be assigned like reference numerals. The drawings are not necessarily to scale, with the emphasis instead placed upon the principles of the present invention. Additionally, each of the embodiments depicted are but one of a number of possible arrangements utilizing the fundamental concepts of the present invention.

[0021] Fig. 1 shows a prior art 3-phase coupled inductor inverter (CII) topology with phase windings placed on separate limbs of a 3 -limb core using a reduced switch count inverter.

[0022] Fig. 2 shows a prior art 3 -phase coupled inductor inverter (CII) topology with a 3-limb magnetic core used in each phase of a 3-phase system, and a Y-connection of three windings.

[0023] Fig. 3 shows a prior art 4-level output voltage waveform produced by the CII topology of Fig. 2, exhibiting a voltage waveform consistent with a large output impedance related to inter-limb leakage flux. [0024] Fig. 4 shows a prior art 7-level output voltage waveform produced by the CII topology of Fig. 2, exhibiting a voltage waveform consistent with a large output impedance related to inter-limb leakage flux.

[0025] Fig. 5 shows an embodiment of a coupled inductor inverter (CII) topology of the present invention, with a 3-limb magnetic core used for a 3-phase system, a Y-connection of three windings, and coupled inductor windings.

[0026] Fig. 6 shows a 4-level output voltage waveform produced by the CII topology of Fig. 5.

[0027] Fig. 7 shows a 7-level output line voltage waveform in a 3-phase AC system produced by the CII topology of Fig. 5.

[0028] Fig. 8 shows an alternative embodiment of a coupled inductor inverter (CII) topology of the present invention, with a 2-winding coupled inductor, and 3 inverter legs per phase.

[0029] Fig. 9 shows an embodiment of a system of the present invention including 3 CII topologies of Fig. 5 connected in a parallel to produce a 3 phase voltage output.

[0030] Fig. 10 shows an embodiment of a toroidal magnetic core and pair of windings that can be used as a coupled inductor in CII topologies of the present invention.

[0031] Fig. 11A shows a first embodiment of C-shaped magnetic cores and pair of windings that can be used as a coupled inductor in CII topologies of the present invention. Fig. 11B shows a second embodiment of C-shaped magnetic cores and pair of windings that can be used as a coupled inductor in CII topologies of the present invention. Fig. 11C shows a third embodiment of C-shaped magnetic cores and pair of winding that can be used as a coupled inductor in CII topologies of the present invention.

[0032] Fig. 12 shows the fundamental current flow in the windings of a 2-winding coupled inductor of the present invention.

[0033] Fig. 13 shows the flux in the magnetic core due to fundamental current flow in a 2-winding coupled inductor of the present invention.

[0034] Fig. 14 shows a normalized fundamental reference signal waveform (Ref 1) with a third harmonic injection for a standard carrier interleaved PWM. [0035] Fig. 15 shows a normalized fundamental reference signal waveform (Ref 2) with a third harmonic injection for an embodiment of a PWM scheme of the present invention, with reference manipulation between -1/3 to 1/3.

[0036] Fig. 16 shows an inverter output voltage using reference signals (Ref 1) of Fig. 14.

[0037] Fig. 17 shows an inverter output voltage using waveform (Ref 2) of Fig. 15, between -1/3 to 1/3 only.

[0038] Fig. 18 shows a cycle of 3 normalized carrier signals for 3 inverter legs per phase.

[0039] Fig. 19 shows a 3 phase PWM line voltage waveform over the cycle of carrier signals shown in Fig. 18, showing that the PWM line voltage frequency is 6 times that of the carrier signal frequency.

[0040] Fig. 20 shows a cycle of 4 normalized carrier signals for 4 inverter legs per phase.

[0041] Fig. 21 shows a 3 phase PWM line voltage waveform over the cycle of carrier signals shown in Fig. 20, showing that the PWM line voltage frequency is 8 times that of the carrier signal frequency.

[0042] Fig. 22 shows a 4-level output voltage waveform produced by the CII topology of Fig. 5.

[0043] Fig. 23 shows a 7-level output voltage waveform produced by the CII topology of Fig. 5.

[0044] Fig. 24 shows the inductor winding currents produced by the CII topology of Fig.

5.

[0045] Fig. 25 shows the 3-phase load currents produced by the CII topology of Fig. 5.

[0046] Fig. 26 shows a 5-level output line voltage waveform produced by the CII topology of Fig. 5, modified to have 4 inverter legs.

[0047] Fig. 27 shows a 9-level output line voltage waveform produced by the CII topology of Fig. 5, modified to have 4 inverter legs.

[0048] Fig. 28 shows the inductor winding currents produced by the CII topology of Fig. 5, modified to have 4 inverter legs. [0049] Fig. 29 shows the 3 phase load currents produced by the CII topology of Fig. 5, modified to have 4 inverter legs.

[0050] Fig. 30 shows an experimental prototype CII to validate an embodiment of the system shown in Fig. 8 and Fig. 9.

[0051] Fig. 31 shows an output phase current (bottom) and an output phase 4-level voltage waveform (top) produced by the prototype of Fig. 30.

[0052] Fig. 32 shows a 3 phase output AC load current (bottom) and an output 7-level line voltage waveform (top) produced by the prototype of Fig. 30.

[0053] Fig. 33 shows three inductor winding currents from the same phase, as produced by the prototype of Fig. 30.

[0054] Fig. 34 shows conventional dot notation for an inductor with windings on a magnetic core.

[0055] Figs. 35A and 35B show conventional dot notation for an inductor with windings coupled in series on a magnetic core, where the windings are in a "series opposing type connection" (Fig. 35 A), in contrast to where the windings are in a "series aiding type connection" (Fig. 35B).

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

[0056] Definitions.

[0057] Any term or expression not expressly defined herein shall have its commonly accepted definition understood by a person skilled in the art.

[0058] For clarity, it will be understood that "winding" refers to a conductive lead (e.g., a wire) wound around a magnetic core a plurality of times such that the conductive lead has the form of a coil.

[0059] Circuit topologies.

[0060] In drawings showing electronic circuit topologies or components thereof

(including Figs. 1, 2, 5, 8, 9, 10, 11, 12, 13, 34, 35A, 35B), elements are illustrated with conventional electronic circuit symbols as understood by persons of ordinary skill in the art. [0061] Conventional dot notation as shown in Figure 34, as will be understood by persons of ordinary skill in the art, is used to indicate voltage polarity in coupled windings of coupled inductors. The voltage at the dotted terminal of each winding (340, 342) with respect to its own non-dotted terminal have the same polarity. That is, if current enters the dotted terminal of one winding (340), then it induces a positive flux in the magnetic core (72). Conversely, if current leaves from the dotted terminal of winding (340), then it induces a negative flux in the magnetic core (72). Fig. 34 can illustrate this dot notation for two cases, which are dependent on the chirality of the windings (340, 342) about the magnetic core (72), from the perspective of current flow through them. In one case, the two windings are considered "cumulatively coupled" if currents flows into both dotted ends. As used herein, "cumulatively coupled", refers to the chirality of the windings (340, 342) about the core (72) being configured such that the magnetic flux induced in the core (72) by the current flow through the windings (340, 342) are additive. In another case, if currents flow out of the dot of one winding (340) and into the dot of the other winding (342) then they are "differentially coupled". As used herein, "differentially coupled", refers to the chirality of the windings (340, 342) about the core (72) being configured such that the magnetic flux induced in the core (72) by the current flow through the windings (340, 342) are opposed in polarity, or subtractive.

[0062] Conventional dot notation, as will be understood by persons of ordinary skill in the art, is also used to indicate polarity of magnetic fields induced in magnetic core by current flowing through coupled windings of inductors in series. Figs. 35A and 35B illustrate this dot notation for two cases, which are differentiated by the chirality of the windings (350, 352) about the magnetic core (72), from the perspective of current flow through them. Fig. 35A shows dot notation for the case of windings in a "series opposing type connection." As used herein, "series opposing type connection" refers to the chirality of the windings (350, 352) about the core (72) being configured such that the magnetic flux induced in the core (72) by current flow through the first winding (350) is opposed (i.e., subtractive or differential) to the magnetic flux induced in the core (72) by current flow through the second winding (352), and vice versa. In other words, the electromotive force (EMF) induced in the second winding (352) by the mutual inductance of the first winding (350) is opposed to the self-induced EMF in the second winding (352), and vice versa. Conversely, Fig. 35B shows dot notation for the case of windings in "series aiding type connection." As used herein "series aiding type connection" refers to the direction of the windings (350, 352) about the core (72) being configured such that the magnetic flux induced in core (72) by current flow through the first winding (352) is additive or cumulative to the magnetic flux induced in the core (72) by current flow through the second winding (352), and vice versa. In other words, the electromotive force (EMF) induced in the second winding (352) by the mutual inductance of the first winding (350) is additive or cumulative to the self-induced EMF in the second winding (352), and vice versa.

[0063] Multi-limb CII topology.

[0064] Fig. 5 shows the topology of an embodiment of a coupled inductor inverter (CII) (i.e., power inverter) of the present invention. The inverter (10) includes an inverter input terminal (12) for connection to a DC power source (14). The inverter input terminal (12) has a positive bus (16) (i.e. a conductive lead) and a negative bus (18) (i.e., another conductive lead) connected in parallel to three inverter legs (20, 22, 24). Each of the three legs (20, 22, 24) includes a pair of switches (26, 28; 30, 32; 34, 36) connected in series. For convenience of reference to Fig. 5, the switches within each pair are referred to as an "upper" switch (26, 30, 34) and a "lower" switch (28, 32, 36), but it will be understood that the terms "upper" and "lower" do not limit any relative vertical position of the switches. Each of the switches (26, 28, 30, 32, 34, 36) may be an electromechanical or semiconductor device, as known to persons skilled in the art, such as a transistor. Each of the switches (26, 28, 30, 32, 34, 36) is connected in anti-parallel to a diode (38, 40, 42, 44, 46, 48), which may be an electromechanical or semiconductor device, as known to persons skilled in the art. (As used herein "anti-parallel" connection means the switch and diode are connected in parallel, but with their polarities reversed.) As appreciated by persons of ordinary skill in the art, the diode (38, 40, 42, 44, 46, 48) provides an alternative current path for an inductive load when one of the paired switches is in an "off state (i.e., the switch is open so as to prevent conduction of electrical current through the switch). Each inverter leg (20, 22, 24) also includes an inverter leg output terminal (50, 52, 54) connected in series between its pair of switches (26, 28; 30, 32; 34, 36). The inverter (10) also includes a coupled inductor assembly including three pairs of conductive windings (56, 58; 60, 62; 64, 66). The first winding (56, 60, 64) of each pair is connected to the first, second, and third inverter leg output terminal (50, 52, 54), respectively. The second winding (58, 62, 66) of each pair is connected in series with the first winding (56, 60, 64) of the pair. As shown by the dot notation in Fig. 5, the electrical coupling of the first windings (56, 60, 64) and their respective second windings (58, 62, 66) is of the "series opposing type connection" rather than of the "series aiding type connection". The second winding (58, 62, 66) of each pair is also connected in series by a Y-connection (68) to a common inverter output terminal (70), which is used for connection to a load (not shown). "Load", as used herein, refers to one or more electrical devices and/or circuits that receive electric power via the inverter output terminal (70). As a non-limiting examples, the load may be a motor or an electric AC power grid or components thereof. The windings are wound around a multi-limb magnetic core (72) in a configuration to produce a magnetizing inductance between the inverter leg output terminals (50, 52, 54), and a low series inductance at the Y-connection (68), meaning that the inductance of the inverter (10) as a whole from the inverter input terminal (12) to the output terminal (70) is relatively low in value.

[0065] This winding configuration is similar to a zig-zag connected 3-phase grounding transformer. In this embodiment, the magnetic core (72) has three spatially separated portions or "limbs" (74, 76, 78) that extend parallel to each other in a longitudinal direction (which is denoted by arrow (80)) from the inverter leg output terminals (50, 52, 54) to the inverter output terminal (70). Limbs (74, 76) are adjacent to each other; limbs (76, 78) are adjacent to each other; and limb (76) is disposed between limbs (74, 78). For the first pair of windings (56, 58), the first winding (56) is wound on limb (74), and the second winding (58) is wound on limb (78). For the second pair of windings (60, 62), the first winding (60) is wound on limb (76), and the second winding (62) is wound on limb (74). For the third pair of windings (64, 66), the first winding (64) is wound on limb (78), and the second winding (66) is wound on limb (76). On limb (74), winding (62) is disposed longitudinally between winding (56) and the inverter output terminal (70). On limb (76), winding (66) is disposed longitudinally between winding (60) and the inverter output terminal (70). On limb (78), winding (58) is disposed longitudinally between winding (64) and the inverter output terminal (70).

[0066] Having regard to the dot notation in Fig. 5, it will be observed that this winding configuration satisfies the following conditions. First, within each pair of windings (56, 58; 60, 62; 64, 66) the windings are in "series opposing type connection." Second, within each pair of windings in series opposing type connection (56, 58; 60, 62; 64, 66), the first winding (56; 60; 64) and the second winding (58; 62; 66) are wound on different spatially separated portions or limbs (74, 76, 78) of the magnetic core (72). Third, the magnetic core (72) is wound by windings from at least two different pairs of windings that are "differentially coupled", in respect to current flow in the direction from their respective inverter leg output terminals (50, 52, 54) to the inverter output terminal (70). The windings on the limbs should be positioned preferably for strong magnetic differential coupling. The strength of magnetic coupling refers to the degree of flux induced by one winding that is coupled to the other winding, which may be expressed as a percentage. As non-limiting examples, the strength may be 95%, preferably 99%, or even more preferably 99.9%. For example, winding (56) of the first pair and winding (62) of the second pair may be considered as being " differentially coupled" on limb (74) in respect to current flow in the direction from their respective inverter leg output terminals (50, 52) to the inverter output terminal (70); winding (60) of the second pair and winding (66) of the third pair may be considered as being "differentially coupled" on limb (76) in respect to current flow in the direction from their respective inverter leg output terminals (52, 54) to the inverter output terminal (70); and winding (64) of the third pair and winding (58) of the first pair may be considered as being "differentially coupled" on limb (78) in respect to current flow in the direction from their respective inverter leg output terminals (54, 50) to the inverter output terminal (70).

[0067] The inverter leg AC output currents are generally equal, so the input current to the first windings (56, 58, 60) (on the left in Fig. 5) are matched by similar currents in the second windings (62, 64, 66) on the right. Noting the dot notation for the coupled inductors, this means that the fundamental AC flux produced by two AC windings on one limb cancel: the winding coupling factor can as high as 0.999. In comparison with the output leakage inductance of the Y-connected 3-limb topology in Fig. 2, the topology of Fig. 5 lowers the output leakage inductance by using the inductor winding connections.

[0068] The effective output impedance is linked to the leakage flux between windings (56, 62; 60, 66; 64, 58) on one limb (74; 76; 78), and core magnetizing inductance is experienced between the inverter leg output terminals (50, 52, 54). The small winding leakage inductance seen at the phase output terminal (i.e., the inverter output terminal (70)), contrasts with the large magnetizing inductance experienced between the inverter leg output terminals (50, 52, 54). This tends to keep the three inverter AC output currents balanced. Assuming that the 3 parallel paths in each phase have similar fundamental AC currents, leakage flux between windings (56, 62; 60, 66; 64, 58) located on the same limb (74; 76; 78) in Fig. 5, is much smaller than the leakage flux between windings located on separate limbs in Fig. 2. Hence, a low fundamental voltage drop is experienced across the low series output inductance, and high quality multi-level output voltages are obtained: compare the phase and line voltages in Figs. 6 and 7 with those shown in Figs. 3 and 4. The high quality of the output voltage is indicated by the consistency within each voltage level, as manifested by the "flat" nature of the voltage levels in Figs. 6 and 7 rather than the "curved" profde of the voltage levels in Figs. 3 and 4. The voltage difference between the inverter legs, is a high frequency switch mode voltage when interleaved switching techniques are used. Thus, the main flux produced in the magnetic core is a high frequency pulsating flux at the inverter switching frequency.

[0069] As noted, the fundamental feature for the coupled inductor design of Fig. 5 is to present a magnetizing inductance between the parallel inverter leg output terminals (50, 52, 54), and a low series inductance at the common output terminal of each phase (i.e., the inverter output terminal (70)). No fundamental AC flux is produced in magnetic cores for the system of Fig. 5, or for a modular system of Fig. 8 (as described below), and as is illustrated in Figs. 12 and 13 using a two-inverter leg structure. (It will be noted that this modular system shown in Figs. 12 and 13 also satisfies the aforementioned three conditions.) The current I _ai in windings (60, 62) and I _a 2 windings (56, 66) would be made almost equal due to the action of a low series inductance, determined by the leakage inductance between two windings on a single core, and a high inductance between the inverter legs. The latter inductance is produced by two series inductances formed by two windings (60, 66; 56, 62) on each core (72a; 72b). The low series inductance is appreciated by considering that for the top inductor shown in Fig. 12, I _ai flows into the winding "dot". As shown in Fig. 13, the fluxes Fi & F ίh the core (72a) oppose each other and essentially cancel. This represents fundamental flux cancellation in the core (72a), and hence a low series inductance for the fundamental output current that is related to the leakage flux between the two windings (60, 66).

[0070] The embodiment of the inverter (10) shown in Fig. 5 has three parallel legs (20, 22, 24), with each leg being defined by its pair of switches and their associated diodes, and the inverter leg output terminal. Other embodiments of the inverter (10) may have a lesser number or parallel number of parallel inverter legs, so long as the inverter (10) has a least two inverter legs. As non-limiting examples, the inverter (10) may have two inverter legs (see Fig. 12), or four, five, or more inverter legs arranged in a manner analogous to that shown in Fig. 5, with a consequential increase in the number of limbs of the core (72) or the number of cores (72).

[0071] Modular CII topology.

[0072] These features can be achieved using a 2-limb winding core or a toroidal 2 winding core, where the windings are located in series with two of the inverter leg output terminals (50, 52, 54). Fig. 8 shows the topology of another CII of the present invention, illustrating this variation. In Fig. 8, elements are assigned reference numerals used in Fig. 5 to refer to like elements. First, as shown by the dot notation, it will again be noted that the electrical coupling of the first windings (56, 60, 64) and the second windings (58, 62, 66) is of the "series opposing type connection" rather than of the "series aiding type connection." Second, it will also be noted that the windings within each pair of windings in series opposing type (56, 58; 60, 62; 64, 66), the first winding (56; 60; 64) and the second winding (58; 62; 66) are wound on different spatially separated portions or limbs. In contrast to the embodiment of Fig. 5, however, in this embodiment, the spatially separated portions or limbs, are defined by spatially separated magnetic cores (72a, 72b, 72c). The first winding (60) of the second pair, and the first winding (64) of the third pair are wound around a first magnetic core (72a) for strong mutual electromagnetic coupling between windings (60, 64). The first winding (56) of the first pair and the second winding (66) of the third pair are wound around a second magnetic core (72b) for strong mutual electromagnetic coupling between windings (56, 66). The second winding (58) of the first pair and the second winding (62) of the second pair are wound around a third magnetic core (72c) for strong mutual electromagnetic coupling between windings (58, 62). Third, it will again be noted that each magnetic core (72a, 72b, 72c) has windings from at least two different pairs of windings that are "differentially coupled" in respect to current flow in the direction from their respective inverter leg output terminals (50, 52, 54) to the inverter output terminal (70), and cumulative coupled when considering currents flowing between the terminals of the inverter legs. For example, winding (56) of the first pair and winding (66) of the third pair are considered to be "differentially coupled" by core (72b) in respect to current flow in the direction from their respective inverter leg output terminals (50, 54) to the inverter output terminal (70), and "cumulatively coupled" when considering currents flowing between the terminals (50, 54); winding (58) of the first pair and winding (62) of the second pair are considered to be "differentially coupled" by core (72c) in respect to current flow in the direction from their respective inverter leg output terminals (50, 52) to the inverter output terminal (70), and "cumulatively coupled" when considering currents flowing between the terminals (50, 52); and winding (60) of the second pair and winding (64) of the third pair are considered to be "differentially coupled" by core (72a) in respect to current flow in the direction from their respective inverter leg output terminals (52, 54) to the inverter output terminal (70), and "cumulatively coupled" when considering currents flowing between the terminals (52, 54). It will be appreciated that inter-core magnetic coupling (i.e., as between cores (72a, 72b, 72c)) is not necessary. It will also be appreciated that a toroidal inductor (e.g., Fig. 10) or two winding inductors (e.g., Figs. 11A to 11C) can be used in series with each inverter leg. Fig. 10 shows an embodiment of a toroidal magnetic core (72) and pair of windings (100, 102). Figs. 11A to 11C show three different embodiments of two C-shaped magnetic cores (72e, 72f) joined end-to-end, and a pair of windings (100, 102). For stronger electromagnetic coupling of the windings (100, 102), the embodiment of Figs. 1 IB and 11C allowing for intra-limb coupling may be preferable to the embodiment of Fig. 11A allowing for inter-limb coupling. The windings on the limbs should be positioned preferably for strong magnetic differential coupling. The strength of magnetic coupling refers to the degree of flux induced by one winding that is coupled to the other winding, which may be expressed as a percentage. As non-limiting examples, the strength may be 95%, preferably 99%, or even more preferably 99.9%. The embodiments of coupled inductors shown in Figs. 10 and 11A-C may be used for the magnetic cores (72a; 72b; 72c) and their associated windings (60, 65; 56, 66; 58; 62) in Fig. 8.

[0073] This CII topology shown in Fig. 8 represents a modular approach where one core (72) is required per inverter leg used. The CII topology shown in Fig. 8 having 2-winding coupled inductors may be more convenient in designing multi -inverter systems than designing a core with a variable number of magnetic limbs. Multiple inverter legs connected in parallel may be required to: (a) produce a higher quality PWM output voltage; and (b) provide more power sharing between multiple parallel inverters. [0074] Fig. 9 illustrates a system (100) of three inverters (10a, 10b, 10c) (as shown in Fig. 5) connected with each other to provide separate phase output voltages, Vpha, Vphb, and Vphc, in a 3-phase output. In Fig. 9, elements are assigned reference numerals used in Fig. 5 to refer to like elements. For simplicity of the drawing, the three inverter legs of each phase are shown by an inverter symbol (11a, l ib, 1 lc) of a single switch in parallel with a diode. However, it will be appreciated that each inverter symbol (11a, l ib, 11c) actually has three inverter legs as shown in Fig. 5. That is, each inverter symbol (11a, l ib, 11c) includes all the components shown within the region (11) defined by the dashed line in Fig. 5. It will also be appreciated that the system (100) of Fig. 9 can be modified by substituting the embodiment of the power inverter (10) shown in Fig. 8 for any one or more of the inverters (10a, 10b, 10c) shown in Fig. 9.

[0075] The embodiment of the inverter (10) shown in Fig. 8 has three parallel legs (20, 22, 24), with each leg being defined by its pair of switches and their associated diodes, and the inverter leg output terminal. Other embodiments of the inverter (10) may have a lesser number or parallel number of parallel inverter legs, so long as the inverter (10) has a least two inverter legs. As non-limiting examples, the inverter (10) may have two, four, five, or more inverter legs arranged in a manner analogous to that shown in Fig. 8, with a consequential increase in the number of limbs of the core (72).

[0076] Magnetic core design.

[0077] In the embodiment shown in Figs. 5 and 9, each of the cores (72) has a form defines a closed loop of rectangular shape. Figs. 10 and 11 illustrate a core (72) defining a closed loop of toroidal shape, and a core (72) having a C shape, respectively, that can be used for the coupled inductors in substitution for the 3-limb core (72) shown in Fig. 5, and the 2-limb cores (72a, 72b, 72c) shown in Fig. 8.

[0078] The size of magnetics used depends upon the peak flux density of the core (72) generated due to differential mode circulating current (DMCC) and common mode circulating current (CMCC). The proposed multi-level voltage topology stops fundamental flux being generated in the magnetic core (72): hence the core (72) size depends mainly on the high-frequency flux generated, winding Cu losses and DC offset currents.

[0079] For an individual system design, say using three inverter legs per phase in a 3- phase system, the 3-limb core (72) shown in Fig. 5 is more suited for utility connected rectifiers or motor drive systems with high power ratings. The 7-level line-voltage may be considered adequate in these applications. Cores with high saturation fluxes, 1.2-1.7 Tesla, should be chosen to avoid core saturation when unbalanced currents are experienced. A single 3-limb core is standard in these situations and will have a lower size and weight than using 3 separate cores.

[0080] Ferrite cores have high permeability and low high frequency losses, and are more suited for low power applications. They have a limitation in that they have a low saturation flux density (B _sat ~ 0.3 T). Magnetic cores with high saturation flux density are preferred in higher power and voltage applications such as nanocrystalline cores (B _sat ~ 1.2 T) or amorphous cores such as Metglas™ (B _sat ~ 1.56 T) (Metglas, Inc.; SC, USA).

[0081] The core selection for the proposed topology will be largely based upon both the high frequency magnetic losses and the core saturation flux density. A typical design normally balances the core losses with the winding Cu losses. For a worst case scenario, the inductor windings in Figs. 8 and 9 experience a high frequency switchmode voltage equal to V _do / ₃ for V3 of a switching cycle (= ¹ /s i ^' _c ) and the peak flux high frequency flux density can be given as equation (1), where N is the number of turns per winding, A _c is the effective iron cross-section of inductor and f _c is the switching frequency.

[0082] Lastly, DC offset currents can flow through the inductor windings between the inverter leg terminals. This is caused by DC voltages being produced by natural variations in device switching edges and also device on-state voltage drops. The DC current is limited mainly by the inductor winding resistance, which can become an important design parameter as a result. This DC current produces a DC flux in the core. A gapped core, or a low permeability core, can therefore be useful for energy storage and avoiding core saturation.

[0083] Pulse width modulation (PWM) schemes.

[0084] Parallel connected CII topologies are often operated using interleaved PWM switching with multiple phase-shifted carriers. However, there is more to the inverter switching than just using multiple carriers. The output voltage waveforms presented in Fig. 7 are produced using 120° phase shifted carriers and 3 inverter legs per phase. The multi-level output line voltage is not ideal.

[0085] Accordingly, PWM switching schemes are presented for 3 -phase systems using the CII topologies with 3 and 4 inverter legs connected in parallel in each phase and for the topologies shown in Figs. 5 and Figs. 8 and 9. Carrier/reference signal manipulation techniques are described that produce high quality multi-level output voltages. An additional advantage of the CII topologies is described where the frequency of the PWM output waveforms is higher than the device switching frequency and related to the number of inverter legs used per phase.

[0086] Standard Interleaving Schemes.

[0087] Three 120° phase shifted carriers can be used to control a CII topology using 3 inverter legs per phase. When 4 inverter legs per phase are used, four 90° phase shifted carriers can be used. Note that there is redundancy in the latter case as a 180° carrier is merely the inverse of a 0° carrier. The output PWM frequency can often be stated as being n times the inverter switching frequency, where n is the number of parallel inverter legs per phase (see reference [32]). When merely using fixed phase shifted carriers, 3 inverter legs per phase produces a good quality 4-level phase voltage waveform. However, the quality of the load current ripple in a 3 -phase load is more dependent on the line voltage, which is not ideal when using merely phase shifted carriers, see Fig. 7. The line voltage harmonic volt-seconds and current total harmonic distortion (THD _f ) can be used to assess the quality of multi-level PWM voltage waveforms.

[0088] Fig. 14 shows a typical sinusoidal reference waveform with third harmonic injection for a standard carrier interleaved PWM.

[0089] Proposed Interleaved PWM Schemes

[0090] For the 3-phase 3 inverter leg per phase CII topology (Fig. 9), 120° phase shifted carriers can be used with one carrier allocated to control the switching of one of the 3 inverter legs in each phase. To improve the quality of the PWM line voltage, the phase reference signal is the same as shown in Fig. 14, but it should be inverted when its voltage lies between -1/3 to 1/3 as shown in Fig. 15. When the reference signal is outside the -1/3 to 1/3 region, standard carrier-reference signal comparison logic is used, as shown in Fig. 16. When the reference signal is inside the -1/3 to 1/3 region, the carrier-reference signal comparison logic is inverted, as shown in Fig. 17. This process represents reference signal manipulation and keeps the same phase-shifted carrier allocation for each inverter leg. Essentially the PWM switching is changed as the reference signal moves between 3 regions: upper, middle and lower. The resulting changes in the inverter switching patterns (compare Figs. 16 and 17), maintains a high quality PWM line voltage. This technique is relatively easy to implement when using a digital modulator such as a digital signal processor (DSP).

[0091] When 4 inverter legs are connected in parallel per phase, signal manipulation should be undertaken as the reference signal moves between four voltage regions: region 1 between 1 and 0.5; region 2 between 0.5 to 0; region 3 from 0 to -0.5; and region 4 between -0.5 to -1. Appropriate signal manipulation can be obtained by switching the carrier phases allocated to each inverter leg from (0°, 90°, 180°, 270°) to (45°, 135°, 225°, 315°). This process represents carrier-signal manipulation using standard carrier-reference signal comparison logic.

[0092] When 3 inverter legs are used per phase, the frequency of the phase PWM output voltage is 3 times the carrier frequency, but more importantly, the line voltage PWM frequency is 6 times the carrier frequency, as shown in Figs. 18 and 19. For example, with a 4 kHz switching frequency, a 24 kHz PWM line frequency is obtained when using 3 inverter legs per phase. When 4 inverter legs are used, the phase PWM frequency is 4 times the switching frequency and the line voltage PWM frequency is 8 times the switching frequency, as shown in Figs. 20 and 21. For example, with a 4 kHz switching frequency, a 32 kHz PWM line frequency is obtained when using 4 inverter legs per phase.

[0093] Simulation Results

[0094] The CII topology of Fig. 5 having 3 inverter legs per phase, and modified to have 4 inverter legs per phase, and the proposed PWM switching techniques of the present invention were simulated using a mathematical model. A 10 kHz switching frequency (f _c ) and DC voltage of 100 V (V _dc ) was used in both cases to approximate values in an experimental laboratory prototype. The inductor windings were simulated as having 2mH/winding inductance. Coupled inductor outputs were simulated as connected to a Y connected 3-phase R-L load (R=8Q & L =2.5 mH). As shown in Figs. 22, and 23, respectively, 4-level phase voltages and 7-level line voltages, respectively were obtained for the 3 inverter leg system. The waveforms obtained represent high quality multi-level PWM voltages where the inverter series output impedances is very low; that is, no distortion of the PWM voltage levels is obtained as a result of fundamental voltage drops across the inverter series output impedance. Similarly, as shown in Figs. 26, and 27, respectively, 5-level phase voltages and 9-level line voltages were obtained using the 4 inverter leg per phase CII.

[0095] Figs. 24 & 28 show the inductor winding currents and Figs. 25 & 29 show the 3- phase load currents when using 3 and 4 inverter legs, respectively. Small DC offsets can be observed in the inductor winding currents. A line voltage PWM frequency of 60 kHz is obtained in the 3 inverter leg per phase CII and 80 kHz for the 4 inverter leg per phase. These high PWM frequencies means that a small AC filter inductor per phase can be used or a full sinewave filter can be drastically reduced in size. The inductor winding high frequency current ripple is higher for the 4 inverter leg per phase topology compared with the 3 inverter leg option, but the 3-phase load current ripple is smaller.

[0096] Experimental Results.

[0097] As shown in Fig. 30, a low power experimental prototype multilevel CII was used to validate the system of Fig. 9 modified to have the CII topologies of Fig. 8 rather than Fig. 5. The prototype had a 100 V DC supply and a 10 kHz switching frequency. Metglas™ toroidal coupled inductors were used, with one coupled inductor per inverter leg. The inductor windings had 40 turns and 5mH inductance. The relative permeability of the magnetic core was 275. Coupled inductor outputs were connected to a Y-connected 3- phase R-L load (R=l 2.5W & L =2.5 mH). Experimental tests were conducted using ROHm (SCT3120AL)™ SiC power MOSFET's modules. A Delfino 32-bit TI (TMS320F28379D)™ digital signal processor (DSP) was used as the digital controller. The controller reference signal used a fundamental sine wave at 60Hz and a carrier frequency of 10 kHz. Fig. 31 shows an output phase current (bottom) together with a 4- level phase voltage waveform (top). Fig. 32 shows the 3-phase AC load currents (bottom) with a 7-level line voltage (top). High frequency voltage spikes can be observed in the phase and line voltages to oscillations associated with the switching edges of the inverter. Fig. 33 shows three inductor winding currents from the same phase. Small jumps in these currents can be observed associated with the moment the reference signal is changed. [0098] Interpretation

[0099] The corresponding structures, materials, acts, and equivalents of all means or steps plus function elements in the claims appended to this specification are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed.

[0100] References in the specification to "one embodiment", "an embodiment", etc., indicate that the embodiment described may include a particular aspect, feature, structure, or characteristic, but not every embodiment necessarily includes that aspect, feature, structure, or characteristic. Moreover, such phrases may, but do not necessarily, refer to the same embodiment referred to in other portions of the specification. Further, when a particular aspect, feature, structure, or characteristic is described in connection with an embodiment, it is within the knowledge of one skilled in the art to affect or connect such module, aspect, feature, structure, or characteristic with other embodiments, whether or not explicitly described. In other words, any module, element or feature may be combined with any other element or feature in different embodiments, unless there is an obvious or inherent incompatibility, or it is specifically excluded.

[0101] It is further noted that the claims may be drafted to exclude any optional element. As such, this statement is intended to serve as antecedent basis for the use of exclusive terminology, such as "solely," "only," and the like, in connection with the recitation of claim elements or use of a "negative" limitation. The terms "preferably," "preferred," "prefer," "optionally," "may," and similar terms are used to indicate that an item, condition or step being referred to is an optional (not required) feature of the invention.

[0102] The singular forms "a," "an," and "the" include the plural reference unless the context clearly dictates otherwise. The term "and/or" means any one of the items, any combination of the items, or all of the items with which this term is associated. The phrase "one or more" is readily understood by one of skill in the art, particularly when read in context of its usage.

[0103] The term "about" can refer to a variation of ± 5%, ± 10%, ± 20%, or ± 25% of the value specified. For example, "about 50" percent can in some embodiments carry a variation from 45 to 55 percent. For integer ranges, the term "about" can include one or two integers greater than and/or less than a recited integer at each end of the range. Unless indicated otherwise herein, the term "about" is intended to include values and ranges proximate to the recited range that are equivalent in terms of the functionality of the composition, or the embodiment.

[0104] As will be understood by one skilled in the art, for any and all purposes, particularly in terms of providing a written description, all ranges recited herein also encompass any and all possible sub-ranges and combinations of sub-ranges thereof, as well as the individual values making up the range, particularly integer values. A recited range includes each specific value, integer, decimal, or identity within the range. Any listed range can be easily recognized as sufficiently describing and enabling the same range being broken down into at least equal halves, thirds, quarters, fifths, or tenths. As a non-limiting example, each range discussed herein can be readily broken down into a lower third, middle third and upper third, etc.

[0105] As will also be understood by one skilled in the art, all language such as "up to", "at least", "greater than", "less than", "more than", "or more", and the like, include the number recited and such terms refer to ranges that can be subsequently broken down into sub-ranges as discussed above. In the same manner, all ratios recited herein also include all sub-ratios falling within the broader ratio.

REFERENCES

[0106] All publications, patents and patent applications mentioned in this specification are indicative of the level of skill of those skilled in the art to which this invention pertains and, where permitted, are herein incorporated by reference to the same extent as if each individual publication, patent, or patent applications was specifically and individually indicated to be incorporated by reference.

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