Title:
PROTECTIVE SHEET FOR SEMICONDUCTOR PROCESSING, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/281861
Kind Code:
A1
Abstract:
[Problem] To provide a protective sheet for semiconductor processing that sufficiently suppresses electrostatic charge generated during processing of a wafer, even if the wafer is being thinned by DBG or the like, and that inhibits cracking of a chip during peeling, and to provide a method for manufacturing a semiconductor device that uses this protective sheet for semiconductor processing. [Solution] This protective sheet for semiconductor processing includes a base material, an anti-static layer, and an energy-ray curable adhesive layer. The surface resistivity of the adhesive layer after energy-ray curing is 5.1×1012 Ω/cm2 to 1.0×1015 Ω/cm2.
Inventors:
TAMURA KAZUYUKI (JP)
Application Number:
PCT/JP2022/014418
Publication Date:
January 12, 2023
Filing Date:
March 25, 2022
Export Citation:
Assignee:
LINTEC CORP (JP)
International Classes:
C09J201/00; C09J7/38; H01L21/301; H01L21/304
Domestic Patent References:
| WO2015156389A1 | 2015-10-15 |
Foreign References:
| JP2011210944A | 2011-10-20 | |||
| JP2020038985A | 2020-03-12 | |||
| JPH11269436A | 1999-10-05 | |||
| JP2021027091A | 2021-02-22 | |||
| JP2015183008A | 2015-10-22 | |||
| JP2012212732A | 2012-11-01 |
Attorney, Agent or Firm:
MAEDA & SUZUKI (JP)
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