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Patent Searching and Data


Title:
PROTECTIVE TAPE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2017/069102
Kind Code:
A1
Abstract:
The purpose of the present invention is to suppress wafer chipping and to improve solder bonding qualities when mounting a semiconductor chip. The present invention includes: a step for affixing a protective tape 10 onto a wafer 21 surface on which bump electrodes 22 are formed, the protective tape having an adhesive layer 11, a thermoplastic resin layer 12, and a substrate film layer 13 in that order; a step for grinding a surface of the wafer 21 opposite the surface to which the protective tape 10 has been affixed; a step for affixing an adhesive tape 30 to the ground surface of the wafer 21; a step for peeling off the protective tape 10 so as to leave the adhesive layer 11 and remove other layers; a step for dicing the wafer 21 to which the adhesive tape 30 has been affixed to obtain individual semiconductor chips; and a step for curing the adhesive layer 11 before dicing. The storage shear modulus of the adhesive layer 11 after curing is 3.0E+08Pa-5.0E+09Pa, and the ratio of the height of the bump electrodes 22 to the thickness of the adhesive layer 11 of the protective tape 10 before affixing (thickness of the adhesive layer before affixing/height of the bump electrodes) is 1/30-1/6.

Inventors:
MORIYAMA HIRONOBU (JP)
Application Number:
PCT/JP2016/080777
Publication Date:
April 27, 2017
Filing Date:
October 18, 2016
Export Citation:
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Assignee:
DEXERIALS CORP (JP)
International Classes:
H01L21/304; H01L21/301; H01L21/56; H01L21/60; H01L21/683; H01L23/29; H01L23/31
Foreign References:
JP2005239884A2005-09-08
JP2005159155A2005-06-16
JP2009206435A2009-09-10
JP2014192238A2014-10-06
JP2012074623A2012-04-12
JP2015520519A2015-07-16
Attorney, Agent or Firm:
NOGUCHI, Nobuhiro (JP)
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