Title:
READOUT CIRCUIT, AND DEBUGGING METHOD AND APPARATUS FOR READOUT CIRCUIT OF MEMORY CHIP
Document Type and Number:
WIPO Patent Application WO/2022/062265
Kind Code:
A1
Abstract:
A readout circuit, and a debugging method and apparatus for a readout circuit of a memory chip. The readout circuit comprises a current comparator; a first input terminal of the current comparator is connected to the drain of a first gating device, the gate of the first gating device is connected to a clamping voltage, the source of the first gating device is connected to a resistive memory cell, and the resistive memory cell stores a high-level signal or low-level signal; a second input terminal of the current comparator is connected to the drain of a second gating device, the gate of the second gating device is connected to a reference voltage, and the source of the second gating device is connected to an adjustable resistor circuit.
Inventors:
XIONG BAOYU (CN)
SHEN AO (CN)
LU HUAN (CN)
AI LIBO (CN)
SHEN AO (CN)
LU HUAN (CN)
AI LIBO (CN)
Application Number:
PCT/CN2020/142224
Publication Date:
March 31, 2022
Filing Date:
December 31, 2020
Export Citation:
Assignee:
ZHEJIANG HIKSTOR TECH CO LTD (CN)
International Classes:
G11C11/16; G11C13/00
Foreign References:
| CN109509492A | 2019-03-22 | |||
| US20180137913A1 | 2018-05-17 | |||
| US20120314478A1 | 2012-12-13 | |||
| CN110797062A | 2020-02-14 | |||
| CN111653299A | 2020-09-11 | |||
| CN103811059A | 2014-05-21 |
Attorney, Agent or Firm:
KANGXIN PARTNERS, P.C. (CN)
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