Title:
REAR SURFACE GRINDING METHOD FOR WAFER AND ELECTRONIC DEVICE PRODUCTION METHOD
Document Type and Number:
WIPO Patent Application WO/2022/158485
Kind Code:
A1
Abstract:
The present invention addresses the problem of providing a rear surface grinding method for a wafer, in which the rear surface of a wafer is ground such that the impact of recesses and protrusions on the front surface of the wafer can be suppressed and in which handling after wafer thinning is improved. The present problem is solved by a rear surface grinding method for a wafer having recesses and protrusions on the front surface thereof, the rear surface grinding method for a wafer being characterized by comprising, prior to rear surface grinding of the wafer, a step (1) for forming a protective layer on the front surface of the wafer, a step (2) for flattening the surface of the protective layer that is not in contact with the wafer, and a step (3) for adhering a support to the surface of the protective layer that is not in contact with the wafer, with an adhesive layer therebetween.
Inventors:
UNEZAKI TAKASHI (JP)
YASUI HIROTO (JP)
TANIMOTO SHUHO (JP)
SUZUKI TAKASHI (JP)
KINOSHITA JIN (JP)
YASUI HIROTO (JP)
TANIMOTO SHUHO (JP)
SUZUKI TAKASHI (JP)
KINOSHITA JIN (JP)
Application Number:
PCT/JP2022/001764
Publication Date:
July 28, 2022
Filing Date:
January 19, 2022
Export Citation:
Assignee:
MITSUI CHEMICALS TOHCELLO INC (JP)
International Classes:
B23D5/02; B24B7/04; H01L21/02; H01L21/304
Foreign References:
| JP2013118324A | 2013-06-13 | |||
| JP2013026380A | 2013-02-04 | |||
| JP2018190855A | 2018-11-29 | |||
| JP2013021017A | 2013-01-31 |
Attorney, Agent or Firm:
ASAMURA PATENT OFFICE, P.C. (JP)
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