Title:
REGULATOR
Document Type and Number:
WIPO Patent Application WO/2021/256352
Kind Code:
A1
Abstract:
[Problem] To provide a regulator that is capable of suppressing output voltage fluctuation while reducing electric power consumption. [Solution] A regulator comprising: a plurality of analog-to-digital converters that compare an output voltage with a threshold voltage so as to successively output, at respective different times, digital signals that are in accordance with the output voltage; an output control circuit that controls the output voltage on the basis of the digital signals; and a timing control circuit that controls, on the basis of at least one of a gate leakage current and a channel leakage current of a transistor in the plurality of analog-to-digital converters, times at which the respective plurality of analog-to-digital converters carry out an analog-to-digital conversion operation to convert the output voltage into the digital signals and times at which the respective plurality of analog-to-digital converters adjust the threshold voltage.
Inventors:
WATANABE HIROYUKI (JP)
Application Number:
PCT/JP2021/021971
Publication Date:
December 23, 2021
Filing Date:
June 09, 2021
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
G05F1/56
Foreign References:
| JP2010170470A | 2010-08-05 | |||
| US20060226898A1 | 2006-10-12 | |||
| JP2004194066A | 2004-07-08 | |||
| JP2016519356A | 2016-06-30 | |||
| JPH11145832A | 1999-05-28 | |||
| JP2003218698A | 2003-07-31 | |||
| JP2020201730A | 2020-12-17 |
Attorney, Agent or Firm:
NAKAMURA Yukitaka et al. (JP)
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