Description

Technical Field

The proposed invention can be classified into the technical field of electricity, i.e. into the field of controllable constant power generators. According to the International Patent Classification 2016.01 (Section H Electricity) issued by the World Intellectual Property Organization, the subject of invention has been marked by H02M (apparatus for conversion between AC and AC, between AC and DC, or between DC and DC, and for use with mains or similar power supply systems; conversion between DC or AC input power into surge output power; control or regulation thereof), with corresponding subclass indexes:

• H02M 3/00 conversion of DC power input into DC power output [ 1 , 2006.01 ] ;

• H02M 3/02 without intermediate conversion into AC [1 , 2006.01];

• H02M 3/04 by static converters [1, 2006.01];

• H02M 3/10 using discharge tubes with control electrode or semiconductor devices with control electrode [1, 4, 2006.01];

• H02M 3/145 using devices of a triode or transistor type requiring continuous application of a control signal [2, 2006.01];

• H02M 3/155 using semiconductor devices only [2, 2006.01];

• H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators

[4, 2006.01];

• H02M 3/158 including plural semiconductor devices as final control devices for a single load [4, 2006.01].

Technical Problem

Controllable constant power generators provide constant power dissipation in a variable resistive load. The generated constant power must be independent of the load resistance variations, with as large as possible load resistance range. This generated power should be easily varied by changing a control voltage and/or a control current. The quality of a controlled constant power generator can be determined by the load resistance dynamic range RLm Rim and the generated power dynamic range Pim Pimin. Here, Rimax and Ri _m m are the largest and the smallest usable load resistance, for a certain value of the generated power Pi. On the other hand, Pi _max and imm are the largest and the smallest usable generated power, for a certain value of the load resistance RL. Due to the existence of feedback loops in controllable constant power generators, stability is the main limiting factor for the load resistance dynamic range Rima Rimm and the generated power dynamic range Pim xI Lmm.

Background Art

Several designs of controllable constant power generators have been developed in bipolar, complementary metal-oxide-semiconductor (CMOS), and bipolar CMOS (BiCMOS) technologies. These designs have been reported in the patent applications, and in the scientific journals (incorporated at the end of this chapter in the form of the non-patent citations).

There are constant power generators with control functions based on signals obtained by sensing of the voltage across the load and the current flowing through the load. These signals determine the actual value of the output power. They are fed to the inputs of feedback circuits for generation of control signals for adjusting the output power to the desired constant value. These feedback circuits can be realized with multiplier circuits, or without multiplier circuits. The multiplier can be implemented by using active electronic components as published in US 20160172855 Al, titled as "Constant power supply for a resistive load", filed July 8, 2014, and in [1], or by using an analog-to-digital converter and digital processor that performs multiplication operation and outputs the results to a digital-to-analog converter (US 20160172855 Al, [2]). When there are no multiplier circuits, the constant power control apparatus can be implemented by using error amplifiers, gain controllers, comparators, power switch controllers, etc. as published in US 20100277139 Al, titled as "Constant power control apparatus and control method thereof, filed Aug. 5, 2009, and in US 20140098570 Al, titled as "Controller for controlling a power converter to output constant power and related method thereof ', filed Oct. 3, 2013.

The controllable constant power generator based on a commercially available power monitor in BiCMOS technology is presented in [1]. It requires an independent supply voltage source of the resistive load branch separated from the supply voltage source of the power monitor itself. In addition, this branch contains the current monitor implemented by a sense resistor connected in series with the resistive load. The voltage drop across the sense resistor proportional to the current of the resistive load is gained in a differential amplifier and then fed to the input of the analog voltage multiplier. The voltage across the resistive load is fed to the other input of the analog voltage multiplier. A feedback loop keeps the equality of the output voltage of the analog voltage multiplier proportional to the resistive load power and the reference voltage proportional to the required power. The ratio of the voltage divider for the resistive load voltage monitoring should be variable because of the input voltage limits of the voltage multiplier within the power monitor. This ratio should be adjusted each time when the variations of the resistive load voltage become too large from the voltage multiplier limitations standpoint, caused by the variations of the load resistance and/or by the different values of the specified power. The controllability of the generated constant power can be performed by varying the reference voltage.

The controllable constant power generator consisting of both analog and digital parts with a microcontroller-based interface and corresponding software tool is presented in [2], This solution involves analog-to-digital converter for data acquisition of the voltage and current of the resistive load, as well as digital-to-analog converter for the generation of the specified power. These functions are directed by a micro-controller with corresponding software. This approach could provide larger both load resistance and generated power dynamic range related to those of analogue controllable constant power generators at the price of larger power consumption, larger occupied chip area or printed circuit board, and slower response.

The controllable constant power generator using a bipolar translinear loop of the balanced type with log-antilog approach [3]-[5] enables a large power dynamic range PimaJPimm. The basic translinear loop consists of 6 npn bipolar junction transistors (BJTs). The currents of the voltage-controlled current sources are fed to the collectors of these BJTs. The voltage across the resistive load and the reference voltage are used as the control voltages of these current sources. Due to negative feedback, voltage across the resistive load is directly proportional to the square root of the load resistance. In this way, the power generated in the resistive load is independent of the load resistance. The controllability of the generated constant power can be performed by varying the reference voltage.

A simple CMOS controllable constant power generator using first order compensation [6] is only usable for small load resistance variations. Due to the negative feedback, the voltages across the resistive load and the reference resistor are kept equal. Consequently, the current flowing through the reference resistor is directly proportional to the current flowing through the resistive load. On the other hand, the current flowing through the resistive load is forced to be proportional to the difference of the reference current and the current flowing through the reference resistor. The power generated in the resistive load is actually dependent on the load resistance variations. However, this dependence can be neglected for small enough load resistance variations. The controllability of the generated constant power can be performed by varying the reference current.

The controllable constant power generator using CMOS translinear loop is presented in [7]. The CMOS translinear loop consists of 4 metal-oxide-semiconductor field-effect- transistors (MOSFETs). This approach is based on maintaining the equality of the voltages across the resistive load and the reference resistor. The circuit for analog signal processing with the current-mode approach provides proportionality of the reference current and the geometric mean of two currents flowing through two MOSFETs within the CMOS translinear loop. Due to the negative feedback, the current flowing through the resistive load is inversely proportional to the square root of the load resistance. In this way, the power generated in the resistive load is independent of the load resistance. The controllability of the generated constant power can be performed by varying the reference current.

The controllable constant power generator based on maintaining the equality of the resistances of two voltage-controlled resistors is presented in [8]. The voltage-controlled resistors are designed using single non-saturated MOSFETs arranged in the form of the resistive mirror [9]. The resistive original resistance within the resistive mirror is determined by the ratio of the voltage proportional to that of the resistive load, and the reference current. The resistive image resistance within the resistive mirror is determined by the ratio of the reference voltage and the resistive load current. Adjustments of these resistances are performed by multiple negative feedback loops involving the voltage transfer circuit, the voltage level shifter, and two non-inverting amplifiers. The equality of the resistive original and the resistive image resistance is provided by the equality of the gate-to-source voltages of non-saturated MOSFETs configuring the resistive original and the resistive image. In this way, the power generated in the resistive load is independent of the load resistance. The controllability of the generated constant power can be performed by varying the reference voltage and/or by varying the reference current. The proposed invention (which is the subject of the patent application) is also based on the resistive mirror approach like the mentioned existing solution [8]. This proposed invention has significant advantages over the existing one [8]:

• The proposed invention has 1 operational amplifier less than the existing solution [8].

• The proposed invention has less number of feedback loops than that of the existing solution [8], providing better stability.

• The operation of the reference current source in the proposed invention is independent of the generated power and/or load resistance. On the other hand, in the case of the existing solution [8] the reference current source cannot operate in the case of small generated power and/or small load resistance. In this case, there is a too small voltage drop across the reference current source within the existing solution [8] affecting its operation.

• The proposed invention provides generation of controllable constant power independent of the temperature variations, unlike in the case of the existing solution [8] where the generated power is affected by the influence of temperature variations to the voltage across the resistive image. This temperature dependent voltage across the resistive image presents the reference voltage in the existing solution [8].

• The proposed invention requires matching of only pairs of n-channel MOSFETs, while the existing solution [8] requires matching of four n-channel MOSFETs. Consequently, the deviations of the generated power related to the expected one are less in the proposed invention than in the existing one [8].

Non-patent citations

[1] D. Sackett, "Constant-power source", Maxim Integrated Products, Application Note 4470, October 27, 2009. [2] P. Asimakopoulos, G. Kalsas, and A. G. Nassiopoulou, "A microcontroller-based interface circuit for data acquisition and control of a micromechanical thermal flow sensor", Journal of Physics: Conference Series 10, pp. 301-304, 2005 (doi: 10.1088/1742- 6596/10/1/074).

[3] A. J. Skinner and M. F. Lambert, "A log-antilog analog control circuit for constant-power warm-thermistor sensors - application to plant water status measurement," IEEE Sensors

Journal, vol. 9, pp. 1049-1057, September 2009 (doi: 10.1109/JSEN.2009.2024057).

[4] A. J. Skinner and M. F. Lambert, "Evaluation of a warm-thermistor flow sensor for use in automatic seepage meters," IEEE Sensors Journal, vol. 9, pp. 1058-1067, September

2009 (doi: 10.1109/JSEN.2009.2024056).

[5] A. J. Skinner, A. K. Wallace, and M. F. Lambert, "A null-buoyancy thermal flow meter with potential application to the measurement of the hydraulic conductivity of soils,"

IEEE Sensors Journal, vol. 11, pp. 71-77, January 2011 (doi:

10.1109/JSEN.2010.2049836).

[6] C. A. Leme, I. Filanovsky, and H. Baltes, "CMOS stabilized DC power source",

Electronics Letters, vol. 28, pp. 1 153-1155, 4 ^th June 1992 (doi: 10.1049/el: 19920728).

[7] S. S. W. Chan and P. C. H. Chan, "A Resistance- Variation-Tolerant Constant-Power

Heating Circuit for Integrated Sensor Applications", IEEE Journal of Solid-State Circuits, vol. 34, pp. 432-439, April 1999 (doi: 10.1 109/4.753676).

[8] N. Tadic, M. Zogovic, and D. Gobovic, "A CMOS controllable constant-power source for variable resistive loads using resistive mirror with large load resistance dynamic range",

IEEE Sensors Journal, vol. 14, pp. 1988-1996, June 2014 (doi:

10.1109/JSEN.2014.2307007).

[9] N. Tadic, "Resistive mirror-based voltage controlled resistor with generalized active devices," IEEE Transactions on Instrumentation and Measurement, vol. 47, pp. 587-591,

April 1998 (doi: 10.1 109/19.744210).

Disclosure of Invention

Maintaining the equality of the resistances of two voltage-controlled resistors is the essence of the invention called resistive mirror based controllable constant power generator. The resistive mirror based voltage-controlled resistors are designed using two non-saturated MOSFETs. One of these MOSFETs presents the resistive original, while the other one presents the resistive image. In order to achieve non-saturated operation of these two MOSFETs, their drain-to-source voltages must be small enough. The gates of these MOSFETs are short connected, while their sources are grounded.

The resistive load RL is placed into the negative feedback loop of the operational amplifier in the standard non-inverting amplifier configuration. The other resistor constituting this non-inverting amplifier is presented by the resistive image. One terminal of the resistive image (the source of the MOSFET) is grounded, while the other terminal (the drain of the MOSFET) is connected to the resistive load RL. In this way, the same current h flows through the resistive load RL and the resistive image. The reference voltage VREF is fed to the input of the non-inverting amplifier. Consequently, the voltage across the resistive image is equal to the reference voltage VREF- In order to achieve non-saturated operation of the MOSFET configuring the resistive image, the reference voltage VREF must be small enough. The resistive image resistance within the resistive mirror is determined by the ratio of the reference voltage VREF and the current h flowing through the resistive load.

The voltage VL across the resistive load RL is amplified by the differential amplifier with the differential gain , and then attenuated by the resistive voltage divider. In this way, the floating voltage VL across the resistive load RL is shifted to the single ended voltage referenced to the ground. The attenuated voltage VL is applied across the resistive original. This operation is performed as follows. The gate-to-drain voltage of the MOSFET configuring the resistive original is provided by the negative feedback loop of the operational amplifier. The inverting terminal of this operational amplifier is connected to the output of the resistive voltage divider with the attenuated voltage VL. The non-inverting terminal of this operational amplifier is connected to the drain of the MOSFET configuring the resistive original. The output of this operational amplifier is fed to the common gates of the MOSFETs configuring the resistive mirror. In addition, the reference current IREF flows throw the resistive original. In order to achieve non-saturated operation of the MOSFET configuring the resistive original, the magnitude of the attenuation of the resistive voltage divider must be large enough. The resistive original resistance within the resistive mirror is determined by the ratio of the attenuated voltage VL across the resistive load RL, and the reference current IREF.

Because the overall negative feedback is maintained, and the non-saturated MOSFETs configuring the resistive original and the resistive image have the same gate-to- source voltages, the equality of the resistive original resistance kj ViJlREF, and the resistive image resistance VREFIIL is provided. Here, ki is the magnitude of the attenuation of the resistive voltage divider. The power generated in the resistive load PL ⁼ VL1L~ VREFIREFI ki is independent of the load resistance RL. The controllability of the generated constant power can be performed by varying the reference voltage VREF, by varying the reference current IREF, and/or by varying the magnitude of the attenuation of the resistive voltage divider k

Brief Description of Drawings

The proposed invention has been described in details using the following figures:

Fig. 1 is complete circuit schematic of the resistive mirror based controllable constant power generator using operational amplifiers of the standard type.

Fig. 2 is complete circuit schematic of the resistive mirror based controllable constant power generator using operational amplifiers with input negative rail capability.

Fig. 3 is circuit schematic of the reference voltage source which is the constitutive part of the resistive mirror based controllable constant power generator.

Fig. 4 is circuit schematic of the reference current source which is the constitutive part of the resistive mirror based controllable constant power generator. Best Mode for Carrying Out of the Invention

The complete circuit schematic of the resistive mirror based controllable constant power generator is shown in Fig. 1. The resistive mirror is designed by the matched n- channel MOSFETs 10 and 11 operating in non-saturated region. The resistive image is presented by the MOSFET 10, while the resistive original is presented by the MOSFET 11. The complete resistive mirror based controllable constant power generator is supplied by a single supply voltage VDD. The operational amplifiers 18, 19, and 20 of a standard type are used. Due to the single supply voltage VDD, the negative rails of the operational amplifiers are connected to the ground, while their positive rails are connected to VDD- In order to provide correct operation of these operational amplifiers in the case of small input voltages (close to the ground), simple source followers are used at their inputs. All of these source followers act as voltage level shifters. The source followers at the inputs of the operational amplifier 18 are designed by the matched p-channel MOSFETs 12 and 13, and the resistors 27 and 28, with The source followers at the inputs of the operational amplifier 19 are designed by the matched p-channel MOSFETs 14 and 15, and the resistors 29 and 30, with R7=Rs- The source followers at the inputs of the operational amplifier 20 are designed by the matched p-channel MOSFETs 16 and 17, and the resistors 31 and 32, with R9=Rio. If the operational amplifiers 33, 34, and 35 with the input negative rail capability are used, the source followers can be omitted, Fig. 2.

The resistive load 21 is put in the negative feedback branch of the non-inverting amplifier 1 designed by the operational amplifier 18 of a standard type, the resistive image 10, and the reference voltage source 8, with the corresponding source followers, Fig. 1. Alternatively, the resistive load 21 is put in the negative feedback branch of the non-inverting amplifier 5 designed by the operational amplifier 33 with the input negative rail capability, the resistive image 10, and the reference voltage source 8, Fig. 2. In this way, the drain-to- source voltage VDSIO of the non-saturated MOSFET 10 is equal to the reference voltage,

Assuming that the total resistance of two resistors 24 and 25 coupled in series is at least 10 times larger than the load resistance 21, RS+R4»RL, nearly the same current flows through the resistive load 21 and the MOSFET 10. The resistive image resistance presented by the channel resistance RDSIO of the non-saturated MOSFET 10 is equal to

The voltage VL across the resistive load 21 is amplified by the differential amplifier 2 designed by the operational amplifier 19 of a standard type, and the resistors 22, 23, 24, and 25, with the corresponding source followers, Fig. 1. Alternatively, the voltage VL across the resistive load 21 is amplified by the differential amplifier 6 designed by the operational amplifier 34 with the input negative rail capability, and the resistors 22, 23, 24, and 25, Fig. 2. In both cases, the differential gain ed of these differential amplifiers is adjusted as follows: . Consequently, the output voltages of the differential amplifiers 2 and 6 are equal to the voltage VL across the resistive load 21. This voltage VL is attenuated by the resistive voltage divider 3 made by the potentiometer 26. In this way, the floating voltage VL across the resistive load 21 is shifted to the single ended voltage referenced to the ground. The voltage at the output of the potentiometer 26 is given by ki VL, where the coefficient ki can be expressed as follows

Here, Rn+Ri2=const. is the overall resistance of the potentiometer 26. The coefficient ki represents the magnitude of the attenuation of the resistive voltage divider. The attenuation of the voltage VL across the resistive load 21 could be performed without using any resistive voltage divider, by adjusting the differential gain Ad in the following manner: . However, because the attenuation of the voltage VL should be large enough, and consequently the differential ga should be small enough, the common-mode rejection ratio CMRR of the differential amplifier could be significantly reduced. Consequently, the accuracy of the whole system could be affected in this way. This is why the attenuation is performed by introducing the resistive voltage divider 3 made by the potentiometer 26, with the differential gain of . In addition, the coefficient ki can be created variable much easier using the resistive voltage divider 3 made by the potentiometer 26 rather than adjusting the differential gain keeping the ratio of two pairs of the resistances mutually equal.

The drain-to-source voltage of the MOSFET 11 must be equal to the voltage kiVL at the output of the potentiometer 26. Consequently, the voltage ki V at the output of the potentiometer 26 must be small enough in order to provide non-saturated operation of the MOSFET 11 representing the resistive original. This is why the coefficient ki<\ must be small enough. The transfer of the voltage kiVL from the output of the potentiometer 26 toward the MOSFET 11 is performed by using voltage transfer circuits 4 and 7 shown in Figs. 1 and 2, respectively. The gate-to-drain transition of the MOSFET 1 1 is put into the negative feedback branch of the operational amplifier 20 of a standard type, while its inverting input is connected to the output of the potentiometer 26, with the corresponding source followers, Fig. 1. Alternatively, the gate-to-drain transition of the MOSFET 1 1 is put into the negative feedback branch of the operational amplifier 35 with the input negative rail capability, while its inverting input is connected to the output of the potentiometer 26, Fig. 2. The reference current source 9 is connected to the drain of the MOSFET 11. Because the drain-to-source voltage of the MOSFET 1 1 is small enough to provide its non-saturated operation, and the supply voltage VDD is large enough, the voltage across the reference current source 9 is always large enough to provide its normal operation independent of the generated power P and/or load resistance RL. The resistive original resistance presented by the channel resistance RDSII of the non-saturated MOSFET 1 1 is equal to

Because the overall negative feedback is maintained, and the non-saturated MOSFETs 10 and 11 have the same gate-to-source voltages, the equality of the resistive image resistance RDSKTVREFIIL, and the resistive original resistance RDSU=ki ViJlREF is provided. The power PL generated in the resistive load 21 is given by ^ nDSIO _ ^~ p _ p T

ΛΟΧ11 j ~ W —

j L ^R L _ ^~ L L ^~ ,— V REF REF ΠΛ

^L L REF *

and it is independent of the load resistance RL. The controllability of the generated constant power Pi can be performed by varying the reference voltage VREF, by varying the reference current IREF, and/or by varying the magnitude of the attenuation of the resistive voltage divider ki.

The circuit schematic of the reference voltage source 8 is shown in Fig. 3. It consists of the potentiometer 36 supplied by the single supply voltage source VDD. The reference voltage VREF at the output of the reference voltage source 8 is given by

and the coefficient k can be expressed as follows =—— (4) R _l3 + R _u where Ri3+R ~const. is the overall resistance of the potentiometer 36.

The circuit schematic of the reference current source 9 is shown in Fig. 4. It consists of the operational amplifier 37 of a standard type, the potentiometer 38 supplied by the single supply voltage source VDD, the p-channel MOSFET 39, and the resistor 40. The reference current IREF at the output of the reference current source 9 is given by

and the coefficient i can be expressed as follows fc ₃ =— ¾2— (6)

^15 + ^16

where Ris+Ri6 ⁼ const. is the overall resistance of the potentiometer 38. Now, the power PL generated in the resistive load 21 can be expressed as follows k ₂ k, V _L

(7)

It is clear that the coefficients ki, k2, and are independent of temperature variations. In order to achieve the zero temperature coefficient of the generated power the following condition must be fulfilled:

(8) In order to achieve the generation of controllable constant power independent of the temperature variations, the normalized temperature coefficient of the supply voltage VDD must be two times smaller than the normalized temperature coefficient of resistance of the resistor 40. This can be performed by using the approach proposed in US 5448103 A, titled as "Temperature independent resistor", filed April 15, 1994. The resistor 40 can be designed by using two or more resistors with different temperature coefficients of resistance coupled together (in series or in parallel) in order to create a total resistor with a predetermined normalized temperature coefficient of resistance two times larger than the normalized temperature coefficient of the supply voltage VDD.

Industrial Applicability

Controllable constant power generators intended for variable resistive loads are very important in various types of thermal-based sensor applications such as mass flowmeters, anemometers, gas monitoring, plant water status measurement, seepage meters, or very slow downward flow rate meters.