| US20120002335A1 | 2012-01-05 | |||
| CN201788230U | 2011-04-06 | |||
| CN202650822U | 2013-01-02 |
TRIPP S: "ELECTROSTATIC DISCHARGE SUPPRESSION WITH MULTILAYER VARISTORS", ELECTRONIC ENGINEERING, MORGAN-GRAMPIAN LTD. LONDON, GB, vol. 66, no. 816, 1 December 1994 (1994-12-01), pages 31/32,34, XP000496369, ISSN: 0013-4902
| Claims 1. A sampling circuit of an electronic transformer, wherein an electronic transformer (CT) has a first output end (12) and a second output end (14) , wherein the sampling circuit of an electronic transformer comprises: a differential sampling chip (IC) , having a positive input end (IN+) and a negative input end (IN-); a first division resistor (Rl) , one end thereof being electrically connected to the first output end (12) and the other end thereof being electrically connected to the positive input end (IN+) ; a first voltage regulator tube (Zl), an anode thereof being electrically connected to the positive input end (IN+) ; and a second voltage regulator tube (Z2), a cathode thereof being electrically connected to a cathode of the first voltage regulator tube (Zl) an anode thereof being electrically connected to the negative input end (IN-) . 2. The sampling circuit of claim 1, wherein the sampling circuit of an electronic transformer further comprises a second division resistor (R2), one end thereof being electrically connected to the second output end (14) and the other end thereof being electrically connected to the negative input end (IN-) . 3. The sampling circuit according to any of the preceding claims, wherein the sampling circuit of an electronic transformer further comprises: a first piezo-resistor (RVl) , one end thereof being electrically connected to the first output end (12) and the other end thereof being grounded; and a second piezo-resistor (RV2), one end thereof being electrically connected to the second output end (14) and the other end thereof being grounded. 4. The sampling circuit according to any of the preceding claims, wherein the sampling circuit of an electronic transformer further comprises: a first transient voltage suppressor (TVS1) , one end thereof being electrically connected to the positive input end (IN+) and the other end thereof being grounded; and a second transient voltage suppressor (TVS2), one end thereof being electrically connected to the negative input end (IN-) and the other end thereof being grounded. 5. The sampling circuit according to any of the preceding claims, wherein the sampling circuit of an electronic transformer further comprises: a first balancing resistor (R3) , one end thereof being electrically connected to the positive input end (IN+) and the other end thereof being grounded; and a second balancing resistor (R4) , one end thereof being electrically connected to the negative input end (IN-) and the other end thereof being grounded. 6. The sampling circuit according to any of the preceding claims, wherein the model of the differential sampling chip (IC) is AD7609. |
SAMPLING CIRCUIT WITH OVERVOLTAGE PROTECTION
Technical Field
The present invention relates to a sampling circuit and, particularly, to a sampling circuit having an overvoltage protection function for an electronic transformer.
Technical Background
A sampling circuit of an electronic transformer is used to input a sensing voltage output by the electronic transformer to a sampling chip, and the sampling circuit also needs to provide overvoltage protection for the sampling chip. In the existing sampling circuit of an electronic transformer, the sensing voltage output by the electronic transformer is input to the sampling chip in a unilateral input manner, rendering that a voltage signal input to the sampling chip is easily affected by electromagnetic interference. In addition, the sensing voltage output by the electronic transformer needs to be reduced in scale so as to meet the input requirements of the sampling chip. In the existing sampling circuit, a resistor division method for a large resistance value is used to reduce the signal amplitude of a sensing voltage so that the ratio error of a voltage signal input to a sampling chip is large, and it is necessary to use a large resistor having a high precision resistance value to make the reduction multiple of the sensing voltage accurate, increasing the manufacturing costs of a sampling circuit of an electronic transformer.
Summary of the Invention
The object of the present invention is to provide a sampling circuit of an electronic transformer so as to reduce the influence of electromagnetic interference on a signal input to a sampling chip. The present invention provides a sampling circuit of an electronic transformer, wherein the electronic transformer has a first output end and a second output end. The sampling circuit of an electronic transformer includes a differential sampling chip, a first division resistor, a first voltage regulator tube and a second voltage regulator tube. The differential sampling chip has a positive input end and a negative input end. One end of the first division resistor is electrically connected to the first output end, and the other end thereof is electrically connected to the positive input end. An anode of the first voltage regulator tube is electrically connected to the positive input end. A cathode of the second voltage regulator tube is electrically connected to a cathode of the first voltage regulator tube, and an anode thereof is electrically connected to the negative input end. As a signal input to the differential sampling chip is a differential signal, the influence of electromagnetic interference on the signal input to the differential sampling chip can be effectively reduced. By means of the first voltage regulator tube and the second voltage regulator tube performing voltage stabilization on the differential signal input to the differential sampling chip, the damage on the differential sampling chip caused by the overvoltage of the differential signal can be avoided.
According to one embodiment of the present invention, the sampling circuit of an electronic transformer comprises a second division resistor, one end thereof being electrically connected to the second output end and the other end thereof being electrically connected to the negative input end.
According to another embodiment of the present invention, the sampling circuit includes a first piezo-resistor and a second piezo-resistor. One end of the first piezo-resistor is electrically connected to the first output end and the other end thereof is grounded. One end of the second piezo-resistor is electrically connected to the second output end and the other end thereof is grounded. According to another embodiment of the present invention, the sampling circuit includes a first transient voltage suppressor and a second transient voltage suppressor. One end of the first transient voltage suppressor is electrically connected to the positive input end and the other end thereof is grounded. One end of the second transient voltage suppressor is electrically connected to the negative input end and the other end thereof is grounded.
According to a further embodiment of the present invention, the sampling circuit includes a first balancing resistor and a second balancing resistor. One end of the first balancing resistor is electrically connected to the positive input end and the other end thereof is grounded. One end of the second balancing resistor is electrically connected to the negative input end and the other end thereof is grounded.
According to a further embodiment of the present invention, the model of the differential sampling chip is AD7609.
Description of the Accompanying Drawings
The following accompanying drawings are merely intended for illustrative description and explanation of the present invention and are not to limit the scope of the present invention .
Fig. 1 is a structure diagram of an illustrative embodiment of a sampling circuit of an electronic transformer.
Fig. 2 is a structure diagram of another illustrative embodiment of a sampling circuit of an electronic transformer.
Description of reference numerals
CT Electronic transformer
12 First output end
14 Second output end
IC Differential sampling chip
IN+ Positive input end
IN- Negative input end
Rl First division resistor R2 Second division resistor
Zl First voltage regulator tube
Z2 Second voltage regulator tube
RVl First piezo-resistor
RV2 Second piezo-resistor
TVS1 First transient voltage suppressor
TVS2 Second transient voltage suppressor.
Detailed Description of further Embodiments
For the sake of better understanding of the technical features, objects and effects of the present utility model, particular embodiments of the present utility model will now be described in detail by reference to the accompanying drawings, in which the same reference numerals refer to the same parts .
In this context, "illustrative" represents "serving as an example, instance or description", and any illustration and embodiment described in "illustrative" in this context should not be explained as a more preferred or more advantageous technical solution.
To make the figures look concise, only parts related to the present utility model are illustratively shown in each of the figures, and they do not represent the practical structure of the product. In addition, to make the figures look concise and easy to understand, in some figures, only one of components with the same structure or function is schematically drawn or marked.
In this context, "a" or "an" represents not only "only one" but also "more than one" .
In this context, "first", "second", etc. are merely used to distinguish from each other, rather than indicate their degree of importance and sequence, etc.
Fig. 1 is a structure diagram of an illustrative embodiment of a sampling circuit of an electronic transformer. As shown in the figure, the sampling circuit of an electronic transformer includes a differential sampling chip IC, a first division resistor Rl , a first voltage regulator tube Zl and a second voltage regulator tube Z2. In addition, an electronic transformer CT using the sampling circuit has a first output end 12 and a second output end 14. The differential sampling chip IC has a positive input end IN+ and a negative input end IN- so as to receive a differential signal from the electronic transformer CT. In an illustrative embodiment of the sampling circuit of an electronic transformer, the differential sampling chip IC can adopt an AD7609 model differential sampling chip. One end of the first division resistor Rl is electrically- connected to the first output end 12, and the other end thereof is electrically connected to the positive input end IN+ . An anode of the first voltage regulator tube Zl is electrically connected to the positive input end IN+, and a cathode thereof is electrically connected to a cathode of the second voltage regulator tube Z2. An anode of the second voltage regulator tube Z2 is electrically connected to the negative input end IN- .
By means of the first division resistor Rl , the excess of the flowing electric current caused by the short circuit of the first voltage regulator tube Zl and the second voltage regulator tube Z2 can be avoided. In an illustrative embodiment of the sampling circuit of an electronic transformer, the sampling circuit of an electronic transformer further comprises a second division resistor R2, one end of the second division resistor R2 being electrically connected to the second output end 14 and the other end thereof being electrically connected to the negative input end IN-. If the first division resistor Rl has a fault, it can be replaced by the second division resistor R2 , avoiding the short circuit of the first voltage regulator tube Zl and the second voltage regulator tube Z2.
As a signal input to the differential sampling chip IC is a differential signal, the influence of electromagnetic interference on the input signal can be effectively reduced. By means of the first voltage regulator tube Zl and the second voltage regulator tube Z2 performing voltage stabilization on the differential signal input to the differential sampling chip IC, the damage on the differential sampling chip IC caused by the overvoltage of the differential signal can be avoided. In addition, the AD7609 model differential sampling chip has a very wide voltage input range so that in an acquisition circuit, there is no need to use a resistor with a large resistance value to reduce the amplitude of a voltage output by the electronic transformer in scale. On one hand, the ratio error of the differential signal input to the differential sampling chip IC can be reduced, and on the other hand, the manufacturing costs of the whole sampling circuit can be reduced.
Fig. 2 is a structure diagram of another illustrative embodiment of a sampling circuit of an electronic transformer. As shown in the figure, in an illustrative embodiment of the sampling circuit of an electronic transformer, the sampling circuit includes a first piezo-resistor RVl , a second piezo- resistor RV2 , a first transient voltage suppressor TVSl and a second transient voltage suppressor TVS2 , wherein one end of the first piezo-resistor RVl is electrically connected to the first output end 12 and the other end thereof is grounded. One end of the second piezo-resistor RV2 is electrically connected to the second output end 14 and the other end thereof is grounded. One end of the first transient voltage suppressor TVSl is electrically connected to the positive input end IN+ and the other end thereof is grounded. One end of the second transient voltage suppressor TVS2 is electrically connected to the negative input end IN- and the other end thereof is grounded.
By means of the first piezo-resistor RVl and the second piezo-resistor RV2 , and the overvoltage suppression of the first transient voltage suppressor TVSl and the second transient voltage suppressor TVS2 , on one hand, the electromagnetic compatibility of the sampling circuit of an electronic transformer can be improved, and on the other hand, the damage on the components of the sampling circuit of an electronic transformer when the electronic transformer outputs a high voltage can further be effectively avoided.
As shown in Fig. 2, in an illustrative embodiment of the sampling circuit of an electronic transformer, the sampling circuit comprises a first balancing resistor R3 and a second balancing resistor R4 , wherein one end of the first balancing resistor R3 is electrically connected to the positive input end IN+ and the other end thereof is grounded. One end of the second balancing resistor R4 is electrically connected to the negative input end IN- and the other end thereof is grounded. By means of arranging the first balancing resistor and the second balancing resistor, a benchmark electric potential can be provided for the differential signal input to the differential sampling chip.
It should be understood that, although the description is given according to each of the embodiments, but not each embodiment merely comprises an independent technical solution, this narration manner of the description is only for clarity, and for those skilled in the art, the description shall be regarded as a whole, and the technical solution in each of the embodiments may also be properly combined to form other implementations that may be understood by those skilled in the art .
The series of detailed descriptions set forth above are merely specific descriptions directed to the feasible embodiments of the present utility model, and are not intended to limit the scope of protection of the present utility model; and all the equivalent embodiments or modifications, such as the combination, segmentation or repetition of features, made without departing from the technical spirit of the present utility model shall be included in the scope of protection of the present utility model.