Title:
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURE THEREOF
Document Type and Number:
WIPO Patent Application WO/2021/038699
Kind Code:
A1
Abstract:
Provided is a semiconductor device comprising: a semiconductor substrate; a trench gate part which is disposed on one primary surface of the semiconductor substrate; a surface electrode which covers the one primary surface of the semiconductor substrate from above; and an interlayer insulation film which insulates the trench gate part from the surface electrode. The semiconductor substrate comprises: a first conductivity type drift region; a second conductivity type body region which is disposed above the drift region; a first conductivity type barrier region which is disposed below at least a portion of the body region; and a first conductivity type pillar region which extends from the one primary surface of the semiconductor substrate to the barrier region and which makes Schottky contact with the surface electrode. The surface electrode comprises an alloy including silicon. The angle of the interlayer insulation film formed by the top side and a lateral side is an acute angle.
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Inventors:
KUWANO SATOSHI (JP)
NISHIWAKI TSUYOSHI (JP)
FURUMURA YUTA (JP)
NISHIWAKI TSUYOSHI (JP)
FURUMURA YUTA (JP)
Application Number:
PCT/JP2019/033386
Publication Date:
March 04, 2021
Filing Date:
August 26, 2019
Export Citation:
Assignee:
DENSO CORP (JP)
International Classes:
H01L21/336; H01L29/47; H01L29/739; H01L29/78; H01L29/861; H01L29/868; H01L29/872
Foreign References:
| JP2018125443A | 2018-08-09 | |||
| JP2017028236A | 2017-02-02 | |||
| JP2003258255A | 2003-09-12 | |||
| JP2019003967A | 2019-01-10 | |||
| JP2010147380A | 2010-07-01 | |||
| US20150221735A1 | 2015-08-06 | |||
| US9786754B1 | 2017-10-10 | |||
| JP2018181949A | 2018-11-15 |
Attorney, Agent or Firm:
KAI-U PATENT LAW FIRM (JP)
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