Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2015/037166
Kind Code:
A1
Abstract:
Disclosed is a semiconductor device wherein characteristic fluctuation of an analog circuit that requires trimming adjustment is suppressed small in long-term storage after package sealing and reflow. On an embedded oxide film (13) of a semiconductor substrate (44), an analog circuit having a trimming mechanism for output adjustment is formed. A trench structure is formed to surround at least one of elements constituting the analog circuit, and the trench structure is provided with an insulating oxide layer (11) having a hollow structure (12).
Inventors:
YAMANE ICHIRO
INOUE MASAKI
INOUE MASAKI
Application Number:
PCT/JP2014/002467
Publication Date:
March 19, 2015
Filing Date:
May 09, 2014
Export Citation:
Assignee:
PANASONIC IP MAN CO LTD (JP)
International Classes:
G05F1/56; H01L21/822; H01L21/329; H01L21/331; H01L21/76; H01L27/04; H01L29/732; H01L29/861; H01L29/866; H01L29/868
Domestic Patent References:
WO2012066703A1 | 2012-05-24 |
Foreign References:
JP2010016296A | 2010-01-21 | |||
JPH11345940A | 1999-12-14 | |||
JP2005259775A | 2005-09-22 | |||
JP2002217369A | 2002-08-02 | |||
JP2010177612A | 2010-08-12 | |||
JP2009182304A | 2009-08-13 | |||
JP2011151241A | 2011-08-04 |
Attorney, Agent or Firm:
MAEDA & PARTNERS (JP)
Patent business corporation MAEDA PATENT OFFICE (JP)
Patent business corporation MAEDA PATENT OFFICE (JP)
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