Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2021/064502
Kind Code:
A1
Abstract:
This semiconductor device has: a CPU; and an accelerator. The accelerator has a first memory circuit, a drive circuit, and a product-sum operation circuit. The first memory circuit has a first data holding unit, a second data holding unit, and a data readout unit. The first data holding unit, the second data holding unit, and the data readout unit have a first transistor. The first transistor has a metal oxide in a channel formation region. First data held in the first data holding unit and second data held in the second data holding unit are weighted data to be inputted to the product-sum operation circuit. The product-sum operation circuit has a function for performing a product-sum operation using the weighted data and input data which is inputted via the drive circuit. The product-sum operation circuit and the drive circuit have a second transistor. The second transistor has silicon in the channel formation region. The first transistor and the second transistor are provided so as to be stacked.
Inventors:
ISHIZU TAKAHIKO
AOKI TAKESHI (JP)
FURUTANI KAZUMA (JP)
IKEDA TAKAYUKI (JP)
YAMAZAKI SHUNPEI (JP)
AOKI TAKESHI (JP)
FURUTANI KAZUMA (JP)
IKEDA TAKAYUKI (JP)
YAMAZAKI SHUNPEI (JP)
Application Number:
PCT/IB2020/058696
Publication Date:
April 08, 2021
Filing Date:
September 18, 2020
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H01L29/786; G06F9/38; G06F17/10; G06N3/063
Domestic Patent References:
| WO2019048982A1 | 2019-03-14 |
Foreign References:
| JP2019036280A | 2019-03-07 | |||
| JP2018129046A | 2018-08-16 | |||
| JP2019047006A | 2019-03-22 | |||
| JP2019046199A | 2019-03-22 |
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