Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2005/001938
Kind Code:
A1
Abstract:
A reduction in current consumption by a step-up voltage generating circuit of a semiconductor integrated circuit during a standby time. The semiconductor integrated circuit comprises a pump circuit which generates a step-up voltage by stepping up an external source voltage and a detection circuit which detects the step-up voltage generated by the pump voltage to control drive/non-drive of the pump circuit. The detection circuit comprises a differential amplifier which compares the step-up voltage with a reference voltage, and a current control circuit which controls the amount of bias current flowing through the differential amplifier depending upon whether the pump circuit is driven or not driven.
Inventors:
TAKEUCHI ATSUSHI (JP)
Application Number:
PCT/JP2003/008212
Publication Date:
January 06, 2005
Filing Date:
June 27, 2003
Export Citation:
Assignee:
FUJITSU LTD (JP)
TAKEUCHI ATSUSHI (JP)
TAKEUCHI ATSUSHI (JP)
International Classes:
G05F3/24; H01L27/04; H02M3/07; H03K4/02; (IPC1-7): H01L27/04; G05F3/26
Foreign References:
| JP2002124084A | 2002-04-26 | |||
| US5994888A | 1999-11-30 | |||
| US6377074B1 | 2002-04-23 | |||
| JPH0554649A | 1993-03-05 | |||
| JPH09326194A | 1997-12-16 |
Attorney, Agent or Firm:
Itoh, Tadahiko (Yebisu Garden Place Tower 20-3, Ebisu 4-chom, Shibuya-ku Tokyo, JP)
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