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Patent Searching and Data


Title:
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2021/103489
Kind Code:
A1
Abstract:
Disclosed are a semiconductor structure and a manufacturing method therefor. The semiconductor structure comprises a semiconductor substrate (20), a metal bonding pad (10), a bump (30), a first solder layer (40), a barrier layer (50) and a second solder layer (60), wherein the metal bonding pad (10) is arranged on the semiconductor substrate (20); the bump (30) is arranged on the metal bonding pad (10); the barrier layer (50) is arranged on a side of the bump (30) that is away from the metal bonding pad (10), and the barrier layer (50) comprises a first surface and a second surface; the first solder layer (40) is arranged between the bump (30) and the first surface; and the second solder layer (60) is provided on the second surface. Due to the fact that the first solder layer (40) and the second solder layer (60) have the characteristic of being able to be stretched when undergoing reflow high-temperature melting, height adjustment is thus automatically performed, and as such the problem of non-wetting due to deformation of an encapsulation base plate after reflow can be solved.

Inventors:
CHUANG LING-YI (CN)
Application Number:
PCT/CN2020/096085
Publication Date:
June 03, 2021
Filing Date:
June 15, 2020
Export Citation:
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Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L23/488
Domestic Patent References:
WO1997041594A11997-11-06
WO2019089171A12019-05-09
Foreign References:
CN209119091U2019-07-16
CN209045542U2019-06-28
US20190131272A12019-05-02
CN102915978A2013-02-06
Attorney, Agent or Firm:
BEIJING INTELLEGAL INTELLECTUAL PROPERTY AGENT LTD. (CN)
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